Saturday, September 29, 2012
Friday, September 28, 2012
Contract position – microfabrication engineer - Intel Inc
Contract position – microfabrication engineer - Intel Inc
Job description:
Seeking microfabrication engineer to fabricate and test microstructures for sensing. The candidate will be responsible for the design, fabrication and characterization of microfabricated devices; comparing the performance of devices fabricated using various conditions, and engaging with application experts to define process requirements and/or constraints for integrated systems.
Full-time (40 hrs/wk) contract position for at least 6 months, available immediately.
Qualifications:
· MS or PhD in Engineering or Science.
· Experience in developing and characterizing microfabricaton process modules (MEMS or electronics processing experience or both), start to end fabrication including mask layout, testing and characterization of micro fabricated devices (at least 2 years of fabrication experience).
· Experience with measurement electronics/apparatus (at least 2 years of experience).
· Experience in surface characterization techniques and microscopy (optical, SEM, TEM, FIB) (at least 2 years of experience)
· Preferable experience in biosensor research as witnessed through publications, reports and/or patents.
· Ability to design and execute experiments and interpret experimental data .
· Ability to solve problems and deliver results on a well-defined timeline.
· Ability to plan projects, prepare progress and share other responsibilities as assigned.
· Strong team and collaboration skills with excellent written and oral communication.
To be considered for this position, submit a cover letter and resume/CV to Noureddine Tayebi (noureddine.tayebi@intel.com).
Cu electroplating
Dear labmembers,
I would like to fill the through wafer via by using Cu electroplating process.
Is there anyone who has done the similar process before, or who has purchased some "ready to use" copper plating solutions from a vendor?
I really appreciate if you would share with me some experiences about the Cu electroplating.
Thanks so much for the help.
Yue
Thursday, September 27, 2012
Fab Closure Reminder: Friday Night - Saturday Morning (Midnight to 7:00am)
Reminder that there will not be access to the SNF cleanroom Friday night at midnight until 7:00am Saturday morning.
The fab will be closed for its first professional monthly cleaning.
Please feel to direct any question you may have, my way.
Wednesday, September 26, 2012
Found NetApp Black Tote Bag in Conference Room 101 - Please Claim if Yours
Dear All,
A black tote bag with NetApp go further, faster logo on the front has been found in the Allen Conference 101 and given to me for safe keeping. If this sounds like sometime you have misplace come by my cubicle #41 and claim it.
Maureen
Monday, September 24, 2012
Construction activity in the cleanroom, Tuesday morning (9/25/12)
Dear labmembers --
Exterior lab doors will be open and shut momentarily Tuesday morning for
inspections. Please do be aware of this activity, as you may want to
avoid working in those areas while the lab doors are inspected. The
contractor will be escorted by staff. We will try to keep disruption to
a minimum and we don't anticipate any major breach to the cleanroom
integrity. Inspections should be done by mid-morning.
Just some background: This is one of the last remaining tasks of the
SNF Renovation project. Starting in November, doors throughout the lab
and the building will be replaced or ugpraded to meet current fire
regulations.
If you have questions or concerns, please contact your favorite staff
member --
Your SNF Staff
--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
Paul G. Allen Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu
Exterior lab doors will be open and shut momentarily Tuesday morning for
inspections. Please do be aware of this activity, as you may want to
avoid working in those areas while the lab doors are inspected. The
contractor will be escorted by staff. We will try to keep disruption to
a minimum and we don't anticipate any major breach to the cleanroom
integrity. Inspections should be done by mid-morning.
Just some background: This is one of the last remaining tasks of the
SNF Renovation project. Starting in November, doors throughout the lab
and the building will be replaced or ugpraded to meet current fire
regulations.
If you have questions or concerns, please contact your favorite staff
member --
Your SNF Staff
--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
Paul G. Allen Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu
Data Clean Corp our new cleanroom cleaning services to start Saturday, Sept 29th from 12-7am. SNF will be closed.
All,
SNF Closure, Saturday, September 29 from 12 - 7 am.
Data Clean Corp is currently scheduled to be here this Friday night / Saturday morning to perform what will be a monthly cleaning service.
The SNF facility will be closed from 12:00 am and reopening at 7:00 am. Please plan your late night activities accordingly.
I will be onsite supervising at this time if you have an emergency need for access please contact me by my cell below to
discuss your needs. I will allow unloading of long run activities but you must schedule it with me.
Please, if you have substrates and other clutter about that can be "put away" it will help to maximize the quality of the cleaning services provided.
They will not work near open substrates or other areas where in their judgement they may impact someones efforts.
I will be present to disposition items as needed to get the best clean for our money.
Your bins will be the safest location and undisturbed.
I will be onsite for this activity and in the cleanroom for the evening.
This month will be a single Friday closure for horizontal surfaces and floors.
Once per Quarter we will close two Friday nights for a "Quarterly" which includes ceiling and wall cleaning. Likely in Oct.
Anyone like working 12-7?
Re: SNF Tool Discipline Disqual Policy
Dear Brett,
I understand this new policy is for documenting the disqualification of a user from a tool, that was done before occasionally.
I would suggest to include the SNF Faculty Director and the offending user's supervisor in the communication during the investigation. I think they should know how the user violated the rule and how the disqualification is decided, before they get the email notification of the final decision.
In addition, there should be a formal appeal process that can handle any conflict or disagreement.
I would suggest to include the SNF Faculty Director and the offending user's supervisor in the communication during the investigation. I think they should know how the user violated the rule and how the disqualification is decided, before they get the email notification of the final decision.
In addition, there should be a formal appeal process that can handle any conflict or disagreement.
Regards,
Kwan-Kyu
__________________________
Kwan-Kyu Park, Ph. D.
Research Associate
E. L. Ginzton Laboratory,
Research Associate
E. L. Ginzton Laboratory,
Center for Nanoscale Science and Engineering
345 Via PeubloStanford University
Stanford, CA 94305
Tel: 650-353-1376
Stanford, CA 94305
Tel: 650-353-1376
email: kwankyup@stanford.edu
On Sep 10, 2012, at 8:50 AM, Brett Huff wrote:
<Tool Discipline Disqual Policy.docx>Labmembers,The attached policy is being provided for your review. It is open to SNF User feedback for the next two weeks. At that time any accepted modifications will be incorporated and the document will be added to the SNF WIKI for future education and disciplinary reference.
Re: SNF Policy for Incoming Wafer Contamination Evaluation
Dear Brett,
Overall, we agree that having good contamination control is critical to the SNF.
Our group (Khuri-Yakub group) has many users, who will be affected by the policy, so we would like to add some questions and make comments and suggestions to the proposed policy.
- Certified clean tool on campus, but outside of the SNF.
Wafers are processed at a shared facilities on campus such as the Ginzton micro-fabrication facility (Nano Building) and the Stanford Nanocharacterization Lab (Nano building) and users' own labs. How does the policy apply to these facilities on campus? It would be helpful if some of these tools and processes are considered to be clean.
- If there are certified clean labs, the policy should state that a list of clean labs will be maintained on the SNF website. It will be very helpful for many users if the list of the information is posted and updated by staff members.
- The policy stated that "If certification procedures are not deemed sufficient by SNF staff, TXRF requirements and success criteria will apply." Before the implementation of the policy, we would like to see examples of the certification procedure on the SNF website for all users.
- Frequency of the submission of the information (including TXRF).
In the case of an off-campus vendor, in which we regularly process wafers, will we still need to submit TXRF every time? Guidelines for the frequency of submission of data to SNF/CCB Spec Mat should be specified before implementation.
- TXRF source.
Similarly, a list of vendors for TXRF data could be posted on the SNF website.
- Applicable process.
Currently, the policy only directly refers to films deposited outside of SNF but it is assumed all incoming wafers are subject to the policy. This should be clearly stated to include all outside processing.
- Current contamination level of the SNF
As the other user suggested last week, we are also interested in the current status of our machine. It will also be valuable information to the all users in SNF and the SNF/CCB members.
I don't think all the information needs to be included in the policy. However, more detailed information should be posted in SNF website for the users, who do not have significant or any experience with TXRF or more generally processing and contamination.
Our group (Khuri-Yakub group) has many users, who will be affected by the policy, so we would like to add some questions and make comments and suggestions to the proposed policy.
- Certified clean tool on campus, but outside of the SNF.
Wafers are processed at a shared facilities on campus such as the Ginzton micro-fabrication facility (Nano Building) and the Stanford Nanocharacterization Lab (Nano building) and users' own labs. How does the policy apply to these facilities on campus? It would be helpful if some of these tools and processes are considered to be clean.
- If there are certified clean labs, the policy should state that a list of clean labs will be maintained on the SNF website. It will be very helpful for many users if the list of the information is posted and updated by staff members.
- The policy stated that "If certification procedures are not deemed sufficient by SNF staff, TXRF requirements and success criteria will apply." Before the implementation of the policy, we would like to see examples of the certification procedure on the SNF website for all users.
- Frequency of the submission of the information (including TXRF).
In the case of an off-campus vendor, in which we regularly process wafers, will we still need to submit TXRF every time? Guidelines for the frequency of submission of data to SNF/CCB Spec Mat should be specified before implementation.
- TXRF source.
Similarly, a list of vendors for TXRF data could be posted on the SNF website.
- Applicable process.
Currently, the policy only directly refers to films deposited outside of SNF but it is assumed all incoming wafers are subject to the policy. This should be clearly stated to include all outside processing.
- Current contamination level of the SNF
As the other user suggested last week, we are also interested in the current status of our machine. It will also be valuable information to the all users in SNF and the SNF/CCB members.
I don't think all the information needs to be included in the policy. However, more detailed information should be posted in SNF website for the users, who do not have significant or any experience with TXRF or more generally processing and contamination.
Regards,
Kwan-Kyu
__________________________
Kwan-Kyu Park, Ph. D.
Research Associate
E. L. Ginzton Laboratory,
Research Associate
E. L. Ginzton Laboratory,
Center for Nanoscale Science and Engineering
345 Via PeubloStanford University
Stanford, CA 94305
Tel: 650-353-1376
Stanford, CA 94305
Tel: 650-353-1376
email: kwankyup@stanford.edu
On Sep 10, 2012, at 9:06 AM, Brett Huff wrote:
<Incoming Wafer Contamination Policy.doc>Labmembers,The attached policy is being provided for your review. It is open to SNF User feedback for the next two weeks. At that time any accepted modifications will be incorporated and the document will be added to the SNF WIKI for future reference.
Friday, September 21, 2012
HF compatible conductivity meter
Dear Labmembers,
Does anyone have access to a solution conductivity meter that is compatible with HF? I have a solution of 1:1 49%HF:Ethanol that I would like to measure its conductivity.
Thank you,
Jeff
Does anyone have access to a solution conductivity meter that is compatible with HF? I have a solution of 1:1 49%HF:Ethanol that I would like to measure its conductivity.
Thank you,
Jeff
Thursday, September 20, 2012
Reminder - Oral Exam Announcement: Jae Hyung Lee
---------- Forwarded message ----------
From: Student Services <studentservices@ee.stanford.edu>
Date: Thu, Sep 13, 2012 at 11:09 AM
Subject: [ee-doctorate] Oral Exam Announcement: Jae Hyung Lee
To: ee-students@lists.stanford.edu
Abstract:
--
EE students mailing list
ee-students@lists.stanford.edu
https://mailman.stanford.edu/mailman/listinfo/ee-students
_______________________________________________
ee-doctorate mailing list
ee-doctorate@lists.stanford.edu
https://mailman.stanford.edu/mailman/listinfo/ee-doctorate
From: Student Services <studentservices@ee.stanford.edu>
Date: Thu, Sep 13, 2012 at 11:09 AM
Subject: [ee-doctorate] Oral Exam Announcement: Jae Hyung Lee
To: ee-students@lists.stanford.edu
PhD Dissertation Defense
Microfabricated Thermionic Energy Converters
Jae Hyung Lee
Department of Electrical Engineering
Advisor: Prof. Roger T. Howe
Monday September 24th 2012
09:15 am
(Refreshments at 09:00 am)
Location: Paul G. Allen Building Annex (CIS-X) Auditorium
Abstract:
Thermionic energy converters (TECs) are unique heat engines that convert heat directly to electricity at very high temperatures. This energy conversion process is based on thermionic emission—the evaporation of electrons from conductors at high temperatures. In its simplest form, the converter consists of two electrodes in the parallel-capacitor geometry and uses the thermionically-emitted current to drive a useful load. In addition, by using a p-type semiconductor material in the emitter electrode, the extra conduction band carrier population created by photoexcitation can enable a new type of electron emission process called photon-enhanced thermionic emission (PETE) process. Microfabricated TECs (μ-TECs) could be used as efficient topping cycles in future concentrated solar thermal power plants as well as for residential co-generation using natural gas.
This talk will cover four key areas of my research on μ-TECs. I will discuss our prototypes of the mechanically and thermally robust μ-TECs, including the optimal emitter-collector gap calculation, structural design, and device fabrication, as well as our recent approach for the stand-alone (encapsulated) μ-TECs. I will also introduce the work function lowering technique through barium & barium oxide coating on the SiC emitter, and the first observation of photon-enhanced thermionic emission from a thin-film microfabricated emitter. Finally, I will talk about our recent fabrication development of smart-cut layer transfer using Spin-on-Glass (SoG).
--
EE students mailing list
ee-students@lists.stanford.edu
https://mailman.stanford.edu/mailman/listinfo/ee-students
_______________________________________________
ee-doctorate mailing list
ee-doctorate@lists.stanford.edu
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Make up in the SNF cleanroom. Not allowed under any circumstance.
SNF Lab Members,
The image below is of a brand new cleanroom hood. Although I have no direct evidence or the funds to go after proving it, this is typical stain caused by make up, destroying this hood.
Please! User know that make up along with many hair care products are not allowed in the fab. If a user is found wearing make up they will be asked to exit the fab immediately and may also
be subject to fab disciplinary action such as being excluded from fab access.
If you are giving a tour inside the fab to non-lab personnel, please be responsibility and exclude individuals when obviously not dressed with proper attire (shoes) or when make up may be present.
process clinic
Hello all,
Just a reminder of the Process Clinic, today, at 11 am in the cube area
near Maureen's office. Bring process questions, process run sheets,
mask layouts, etc. Staff will be on hand to brainstorm ideas.
Staff
Just a reminder of the Process Clinic, today, at 11 am in the cube area
near Maureen's office. Bring process questions, process run sheets,
mask layouts, etc. Staff will be on hand to brainstorm ideas.
Staff
MS patches for IE 0-day
SNF Lab Members:
Earlier this week a zero-day bug affecting Microsoft Internet Explorer (their browser) was reported. Microsoft has just released an emergency fix for this problem and will likely have a second, more comprehensive patch, tomorrow. If you use Internet Explorer on a Windows desktop or laptop you are at risk.
Here is a message from John Gerth in the Computer Science department who keeps on top of such things. The first link in his post that starts with blogs.technet.com will take you to an article which has a like to the Microsoft Fix it 50939 that addresses this issue. This Fix it will not require a reboot of your machine and I suggest that you install it at your earliest convenience.
While this vulnerability has nothing directly to do with SNF or Coral, I sent it out in hopes of preventing you and your machines from being adversely affected by exploits taking advantage of this flaw. Also, I trust that SNF staff will not only apply this patch to their own laptops and desktops, but to lab equipment running Windows that may also have Internet Explorer.
Thank you for your attention,
John
-------- Original Message --------
Earlier this week a zero-day bug affecting Microsoft Internet Explorer (their browser) was reported. Microsoft has just released an emergency fix for this problem and will likely have a second, more comprehensive patch, tomorrow. If you use Internet Explorer on a Windows desktop or laptop you are at risk.
Here is a message from John Gerth in the Computer Science department who keeps on top of such things. The first link in his post that starts with blogs.technet.com will take you to an article which has a like to the Microsoft Fix it 50939 that addresses this issue. This Fix it will not require a reboot of your machine and I suggest that you install it at your earliest convenience.
While this vulnerability has nothing directly to do with SNF or Coral, I sent it out in hopes of preventing you and your machines from being adversely affected by exploits taking advantage of this flaw. Also, I trust that SNF staff will not only apply this patch to their own laptops and desktops, but to lab equipment running Windows that may also have Internet Explorer.
Thank you for your attention,
John
-------- Original Message --------
| Subject: | [GECOS] MS patches for IE 0-day |
|---|---|
| Date: | Thu, 20 Sep 2012 00:29:43 -0700 |
| From: | John Gerth <gerth@graphics.stanford.edu> |
| Organization: | Stanford University |
| To: | SOE - GECOS <gecos@island.stanford.edu> |
There's an emergency fixit available today....full patch due Friday Sep 21 http://blogs.technet.com/b/msrc/archive/2012/09/19/internet-explorer-fix-it-available-now-security-update-scheduled-for-friday.aspx SANS... http://isc.sans.edu/diary/IE+Fixes+Available/14134 Krebs... http://krebsonsecurity.com/2012/09/microsoft-issues-stopgap-fix-for-ie-0-day-flaw/ -- John Gerth gerth@graphics.stanford.edu Gates 378 (650) 725-3273 _______________________________________________ GECOS mailing list GECOS@island.stanford.edu http://island.stanford.edu/cgi-bin/mailman/listinfo/gecos
Wednesday, September 19, 2012
SNF etcher are fully permitted
All,
We are pleased to report all four of the new etchers (dielectric, metal,
deep silicon and the III-V) have completed the county permitting
process. We are now able to turn on all of the dozen, or so gases
plumbed to the systems. What remains ahead of us is the vendor start-up
of the tools and our etch process characterizations.
At this time, Plasma-Therm is doing their installation start-up tests on
the dielectric and metal etchers. Their deep silicon process engineer
will be on site next week. It is the expectation of Plasma-Therm that
all three of their etchers will be released to us by Friday, Sept.
28th. The Oxford III-V etcher is running a little slower. I have a
commitment from Oxford today saying they will have someone on site by no
later than Monday, Sept. 24th to complete the tool installation and
start-up. I believe the Oxford is running about a week behind the
Plasma-Therm systems and expect it to be released around Friday, Oct. 5th.
Once the tools are released, it is up the staff and the SNF community to
drive the characterization of the etches. The date for full release of
the systems depends on how much manpower we can pull together to work
through the characterizations. Each etch vendor has recommended recipes
for the more common etches. We need to verify and document the
performance for each of these recipes. This requires the correct
substrate material stacks, photolithography masking, etch recipe splits,
metrology for etch rates, selectivity, CD loss, sidewall profiles,
documentation of the operation procedures and updating the wiki. Each
recipe could take two full, hard weeks to collect all of this
information. When you multiply four etchers with multiple recipes, the
total characterization time expands quickly. If we all pull together we
could start opening these systems up to the community by the end of
October.
Regards,
SNF Staff
We are pleased to report all four of the new etchers (dielectric, metal,
deep silicon and the III-V) have completed the county permitting
process. We are now able to turn on all of the dozen, or so gases
plumbed to the systems. What remains ahead of us is the vendor start-up
of the tools and our etch process characterizations.
At this time, Plasma-Therm is doing their installation start-up tests on
the dielectric and metal etchers. Their deep silicon process engineer
will be on site next week. It is the expectation of Plasma-Therm that
all three of their etchers will be released to us by Friday, Sept.
28th. The Oxford III-V etcher is running a little slower. I have a
commitment from Oxford today saying they will have someone on site by no
later than Monday, Sept. 24th to complete the tool installation and
start-up. I believe the Oxford is running about a week behind the
Plasma-Therm systems and expect it to be released around Friday, Oct. 5th.
Once the tools are released, it is up the staff and the SNF community to
drive the characterization of the etches. The date for full release of
the systems depends on how much manpower we can pull together to work
through the characterizations. Each etch vendor has recommended recipes
for the more common etches. We need to verify and document the
performance for each of these recipes. This requires the correct
substrate material stacks, photolithography masking, etch recipe splits,
metrology for etch rates, selectivity, CD loss, sidewall profiles,
documentation of the operation procedures and updating the wiki. Each
recipe could take two full, hard weeks to collect all of this
information. When you multiply four etchers with multiple recipes, the
total characterization time expands quickly. If we all pull together we
could start opening these systems up to the community by the end of
October.
Regards,
SNF Staff
Re: Problem p5000etch SNF 2012-09-18 12:06:13: Process stopped. MFC12 reported low flow fault
Pumped down the HBr MFC and reduced HBr delivery pressure
Tuesday, September 18, 2012
Monday, September 17, 2012
help with platinum silicide
Does anyone out there know of a good vendor who implants platinum into silicon?
Thanks,
Hector
Wet etch strip of Ti/Al/Ni/Au stack
Hi SNF people,
I would like to strip a metal stack of Ti/Al/Ni/Au with a wet etching recipe, but I'm not too sure what chemicals would be best suitable.
My original thought was to remove the Au, Ni, and Al layers with aqua regia solution, and then remove the Ti layer with dilute HF, but I am not sure if this will work.
Does anyone with experience have any better ideas?
Thanks,
Vijay Parameshwaran
vijayp@stanford.edu
I would like to strip a metal stack of Ti/Al/Ni/Au with a wet etching recipe, but I'm not too sure what chemicals would be best suitable.
My original thought was to remove the Au, Ni, and Al layers with aqua regia solution, and then remove the Ti layer with dilute HF, but I am not sure if this will work.
Does anyone with experience have any better ideas?
Thanks,
Vijay Parameshwaran
vijayp@stanford.edu
Sunday, September 16, 2012
Friday, September 14, 2012
Cell phone found in gowning room
begin:vcard
fn:Jeannie Perez
n:Perez;Jeannie
org:Stanford University;Stanford Nanofabrication Facility
adr;dom:;;420 Via Palou Mall, CIS 146;Sanford;CA;94305-4070
email;internet:jperez@snf.stanford.edu
title:Techical Trainer
tel;work:650 723-7997
tel;fax:650 725-6278
x-mozilla-html:FALSE
url:https://spf.stanford.edu/SNF/
version:2.1
end:vcard
See Maurice in his office.
JP
fn:Jeannie Perez
n:Perez;Jeannie
org:Stanford University;Stanford Nanofabrication Facility
adr;dom:;;420 Via Palou Mall, CIS 146;Sanford;CA;94305-4070
email;internet:jperez@snf.stanford.edu
title:Techical Trainer
tel;work:650 723-7997
tel;fax:650 725-6278
x-mozilla-html:FALSE
url:https://spf.stanford.edu/SNF/
version:2.1
end:vcard
See Maurice in his office.
JP
Etcher Installation Update
All,
I am please to announce that we have crossed the most significant
hurdles in the etcher installation project. We have two of the three
County signatures required for completion of the installation project.
The two signatures we have are the most difficult to obtain. I
anticipate receiving the final signature early next week. The timing
works out well as both Oxford and Plasma-Therm are scheduled to begin
the process start-up on all four tools next week. I anticipate the
start-up effort to take one or two weeks for all the tools. Once the
tools pass the companies start-up procedures they will be released to
the SNF.
Having the tools released to the SNF does not mean they are ready for
general use. The performance of the tools need to be documented (some
companies call this finger printing of the tool). The idea is to
capture the performance of items such as pump down curves, leak-up
rates, source power curves, heating and cooling rates, pressure vs.
flow, etc... Once this is accomplished we will need to look at the
robustness of the standard, factory recommended recipes. This will
involve running some DoE experiments of the base recipes. The object
here is to understand and document the various input parameters with the
resulting outputs. While this information is being collected we will
work with lab member community to identify specific etching needs which
need to be developed. We will assemble the requests and develop simple
screening and Response Surface DoE's to help us develop a suite of recipes.
In order to expedite the learning process, I am asking interested lab
members, who are willing to help define, run and characterize the
resulting DoE wafer splits. If you are willing to contribute to the
community knowledge base please contact Ed Myers. If you have specific
needs for your etch, please send me these requirements so we can add it
the required development list.
As a reminder the new etch tools include:
Plasma-Therm dielectric etcher
Plasma-Therm metal etcher
Plasma-Therm deep silicon etcher
Oxford III-V or compound semiconductor etcher
Regards,
SNF Staff
I am please to announce that we have crossed the most significant
hurdles in the etcher installation project. We have two of the three
County signatures required for completion of the installation project.
The two signatures we have are the most difficult to obtain. I
anticipate receiving the final signature early next week. The timing
works out well as both Oxford and Plasma-Therm are scheduled to begin
the process start-up on all four tools next week. I anticipate the
start-up effort to take one or two weeks for all the tools. Once the
tools pass the companies start-up procedures they will be released to
the SNF.
Having the tools released to the SNF does not mean they are ready for
general use. The performance of the tools need to be documented (some
companies call this finger printing of the tool). The idea is to
capture the performance of items such as pump down curves, leak-up
rates, source power curves, heating and cooling rates, pressure vs.
flow, etc... Once this is accomplished we will need to look at the
robustness of the standard, factory recommended recipes. This will
involve running some DoE experiments of the base recipes. The object
here is to understand and document the various input parameters with the
resulting outputs. While this information is being collected we will
work with lab member community to identify specific etching needs which
need to be developed. We will assemble the requests and develop simple
screening and Response Surface DoE's to help us develop a suite of recipes.
In order to expedite the learning process, I am asking interested lab
members, who are willing to help define, run and characterize the
resulting DoE wafer splits. If you are willing to contribute to the
community knowledge base please contact Ed Myers. If you have specific
needs for your etch, please send me these requirements so we can add it
the required development list.
As a reminder the new etch tools include:
Plasma-Therm dielectric etcher
Plasma-Therm metal etcher
Plasma-Therm deep silicon etcher
Oxford III-V or compound semiconductor etcher
Regards,
SNF Staff
Thursday, September 13, 2012
Re: Problem p5000etch SNF 2012-09-12 12:35:58: Cassette is warped
Changed the blue cassette to a white teflon cassette.
Leveled both A and B cassette platform, changed
bottom slot offset and slot spacing . Cycled wafers
on slot's 1,2,10,11,24 and 25 from cassette elevator
to the storage elevator..
Leveled both A and B cassette platform, changed
bottom slot offset and slot spacing . Cycled wafers
on slot's 1,2,10,11,24 and 25 from cassette elevator
to the storage elevator..
https://snf.stanford.edu/SNF will be down early tomorrow morning ...
SNF Lab Members:
The portion of our web site available under https://snf.stanford.edu/SNF
(AKA "the wiki") will be down early tomorrow morning starting at about 6
a.m. for upgrades to the underlying Plone content management system.
These upgrades may take as much as 2-3 hours. The remainder of the
snf.stanford.edu and everything related to running Coral and/or
xReporter will be fully functional during that entire time.
These changes will be the first step in addressing the sluggish response
that you see on that portion of the web site.
Let me know if you have any questions and thank you for your continued
support,
John
The portion of our web site available under https://snf.stanford.edu/SNF
(AKA "the wiki") will be down early tomorrow morning starting at about 6
a.m. for upgrades to the underlying Plone content management system.
These upgrades may take as much as 2-3 hours. The remainder of the
snf.stanford.edu and everything related to running Coral and/or
xReporter will be fully functional during that entire time.
These changes will be the first step in addressing the sluggish response
that you see on that portion of the web site.
Let me know if you have any questions and thank you for your continued
support,
John
Fwd: [ee-doctorate] Oral Exam Announcement: Jae Hyung Lee
Dear lab members,
I would like to invite you all to my defense talk on Sep 24th 9 am on Monday. Thank you very much!
Best,
Jae
I would like to invite you all to my defense talk on Sep 24th 9 am on Monday. Thank you very much!
Best,
Jae
---------- Forwarded message ----------
From: Student Services <studentservices@ee.stanford.edu>
Date: Thu, Sep 13, 2012 at 11:09 AM
Subject: [ee-doctorate] Oral Exam Announcement: Jae Hyung Lee
To: ee-students@lists.stanford.edu
Abstract:
--
EE students mailing list
ee-students@lists.stanford.edu
https://mailman.stanford.edu/mailman/listinfo/ee-students
_______________________________________________
ee-doctorate mailing list
ee-doctorate@lists.stanford.edu
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From: Student Services <studentservices@ee.stanford.edu>
Date: Thu, Sep 13, 2012 at 11:09 AM
Subject: [ee-doctorate] Oral Exam Announcement: Jae Hyung Lee
To: ee-students@lists.stanford.edu
PhD Dissertation Defense
Microfabricated Thermionic Energy Converters for Solar Electricity Generation
Jae Hyung Lee
Department of Electrical Engineering
Advisor: Prof. Roger T. Howe
Monday September 24th 2012
09:15 am
(Refreshments at 09:00 am)
Location: Paul G. Allen Building Annex (CIS-X) Auditorium
Abstract:
Solar is the most attractive renewable energy source because it has the potential to meet global energy demands and is present everywhere. However, existing solar cells can be inefficient due to heat generated while converting solar light to electricity. Our novel approach to solid-state solar power, thermionic energy converters (TECs), are unique heat engines that convert heat directly to electricity at very high temperatures. This energy conversion process is based on thermionic emission—the evaporation of electrons from conductors at high temperatures. In its simplest form, the converter consists of two electrodes in the parallel-capacitor geometry and uses the thermionically-emitted current to drive a useful load. In addition, by using a p-type semiconductor material in the emitter electrode, the extra conduction band carrier population created by photoexcitation can enable a new type of electron emission process called photon-enhanced thermionic emission (PETE) process. Microfabricated TECs (μ-TECs) could be used as efficient topping cycles in future concentrated solar thermal power plants as well as for residential co-generation using natural gas.
This talk will cover four key areas of my research on μ-TECs. I will discuss our prototypes of the mechanically and thermally robust μ-TECs, including the optimal emitter-collector gap calculation, structural design, and device fabrication, as well as our recent approach for the stand-alone (encapsulated) μ-TECs. I will also introduce the work function lowering technique through barium & barium oxide coating on the SiC emitter, and the first observation of photon-enhanced thermionic emission from a thin-film microfabricated emitter. Finally, I will talk about our recent fabrication development of smart-cut layer transfer using Spin-on-Glass (SoG).
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Wednesday, September 12, 2012
Problem p5000etch SNF 2012-09-12 16:24:42: broken wafer
Wafer went into chamber B whole. When I unloaded it, there was a large 5mm wide piece of the wafer missing (near the edge). I don't see the piece of wafer so it could be in the loading robotics or it could still be in Chamber B.
Problem p5000etch SNF 2012-09-12 12:35:58: Cassette is warped
Do not use cassette slot 20-25. We will replace the cassette but we will need to re-do the calibration.
Tuesday, September 11, 2012
Problem p5000etch SNF 2012-09-11 18:24:52: can't load wafer
The arm goes out to pick up the wafer but comes back empty. I tried several times both A and B and at different locations but still didn't work.
Re: Shutdown p5000etch SNF 2012-09-11 00:02:16: Wafer stuck in load lock chamber
Recovered the user's wafer and cleaned the robot blade.
Shutdown p5000etch SNF 2012-09-11 00:02:16: Wafer stuck in load lock chamber
When unloading, a double polished wafer (same as previous reported problems) was stuck to the transfer arm when it finished unloading and pulled back into the load lock. Please handle with care. Thanks and sorry.
Monday, September 10, 2012
ITO deposition for transparent conductive electrodes
Dear labmembers,
does anyone deposit ITO (indium tin oxide) for optically transparent gate electrodes?
If so, which technique do you use? We would like to use it with a material where we can not exceed 80 degrees Celsius during processing. Does anyone think this is possible?
Thanks in advance!
Reyes
Dr. Reyes Calvo
Marie Curie IOF Postdoctoral Fellow
Goldhaber-Gordon Lab
Geballe Laboratory for Advanced Materials
McCullough Building, 476 Lomita Mall
Stanford University
Stanford, CA 94305-4045
Re: SNF Policy for Incoming Wafer Contamination Evaluation
Bret,
Not to be rude, but how do we know the current contamination levels on the clean tools in SNF?
SNF needs to do its own TXRF reports on clean tools, before going after users.
Please let me know.
Pradeep
Not to be rude, but how do we know the current contamination levels on the clean tools in SNF?
SNF needs to do its own TXRF reports on clean tools, before going after users.
Please let me know.
Pradeep
On Mon, Sep 10, 2012 at 9:06 AM, Brett Huff <bhuff@stanford.edu> wrote:
Labmembers,The attached policy is being provided for your review. It is open to SNF User feedback for the next two weeks. At that time any accepted modifications will be incorporated and the document will be added to the SNF WIKI for future reference.
SNF Policy for Incoming Wafer Contamination Evaluation
Labmembers,
SNF Tool Discipline Disqual Policy
Labmembers,
The attached policy is being provided for your review. It is open to SNF User feedback for the next two weeks. At that time any accepted modifications will be incorporated and the document will be added to the SNF WIKI for future education and disciplinary reference.
Re: Problem p5000etch SNF 2012-09-09 16:20:05: wafer slips during transfer from load lock
verified wafer hand off to cassette with no problems
Sunday, September 9, 2012
Problem p5000etch SNF 2012-09-09 16:20:05: wafer slips during transfer from load lock
While unloading double polished wafers from load lock to cassette, the arm does not set the wafers properly on the cassette (wafer is still tilted) and pulls the unloaded wafer back into the load lock, causing the wafer to slip. Unloading is alright for single-side polished wafers. Could we have the robot handler checked?
Thursday, September 6, 2012
Question on thin crystalline SiC growth
Dear lab members,
Does anyone have any experience in depositing very thin (~5nm or less) SiC film or carbonizing the Si surface in CVD machine?
Your help will be greatly appreciated.
--
Kind Regards,
Esther Chang
Kind Regards,
Esther Chang
Lost Car Keys and Phone - Please Claim
Dear All,
A concerned lab member found keys and phone at the coral workstation near Uli and Jeannie’s office. If these items are yours please come by my cubicle # 41 and claim.
Maureen
Fwd: Fwd: Plasma-Therm Technical Workshop: Fundamentals of Plasma Processing (Etching and Deposition)
All,
Thank you for the tremendous support. As of now, registration is officially closed.
I have received a number of inquires regarding acknowledgement of registration. The web site was not configured to send out any acknowledgements. If you successfully completed the registration form, then your attendance has been captured and we are planning on your attendance.
Those on the waiting list who registered prior to noon today, should plan on attending. We may have slightly overbooked the seats, but we will not know until everyone arrives.
Plasma-Therm and SNF look forward to seeing everyone on Monday.
Regards,
-------- Original Message --------
All,
Due to the overwhelming response, we have reached the allowable occupancy level in the conference room. I encourage you to still sign up, but please be aware it will be on a waiting list status.
I also encourage those who have registered and know they will not be attending the full two days to let me know. I'm sure you don't want to be responsible for preventing anyone from attending.
Regards,
Ed
-------- Original Message --------
Thank you for the tremendous support. As of now, registration is officially closed.
I have received a number of inquires regarding acknowledgement of registration. The web site was not configured to send out any acknowledgements. If you successfully completed the registration form, then your attendance has been captured and we are planning on your attendance.
Those on the waiting list who registered prior to noon today, should plan on attending. We may have slightly overbooked the seats, but we will not know until everyone arrives.
Plasma-Therm and SNF look forward to seeing everyone on Monday.
Regards,
-------- Original Message --------
| Subject: | Fwd: Plasma-Therm Technical Workshop: Fundamentals of Plasma Processing (Etching and Deposition) |
|---|---|
| Date: | Thu, 30 Aug 2012 10:36:46 -0700 |
| From: | Ed Myers <edmyers@stanford.edu> |
| To: | labmembers@snf.stanford.edu |
All,
Due to the overwhelming response, we have reached the allowable occupancy level in the conference room. I encourage you to still sign up, but please be aware it will be on a waiting list status.
I also encourage those who have registered and know they will not be attending the full two days to let me know. I'm sure you don't want to be responsible for preventing anyone from attending.
Regards,
Ed
-------- Original Message --------
| Subject: | Plasma-Therm Technical Workshop: Fundamentals of Plasma Processing (Etching and Deposition) |
|---|---|
| Date: | Thu, 09 Aug 2012 16:28:22 -0700 |
| From: | Ed Myers <edmyers@stanford.edu> |
| To: | labmembers@snf.stanford.edu |
| CC: | Lishan, David (Plasma-Therm LLC) <david.lishan@plasmatherm.com> |
All, SNF and Plasma-Therm would like to invite you and your team members to attend the Plasma-Therm Technical Workshop: Fundamentals of Plasma Processing (Etching and Deposition) to be held at the Stanford University on September 10 and 11, 2012. The Workshop is intended to provide understanding and insight to those working with plasma etching and deposition processes and equipment. The goal is to help researchers make faster progress on projects requiring plasma processing. The course has been very well received at Harvard, UC Berkeley, UCLA, Notre Dame, USF, IMRE, Israel, and Lund University. Graduate students, post docs, professors, and staff have all found the material useful. The format encourages questions and we hope attendees take advantage of the opportunity for networking and discussing their projects. The workshop is meant to encourage cooperation within the academic and industrial research communities. Please be assured that the course is not an advertisement about Plasma-Therm products. Aside from a very brief 15 min introduction to Plasma-Therm, the rest of the day is dedicated to education on fundamentals and advanced etching and plasma-enhanced chemical vapor deposition technology. Presentation materials are equally useful to those that do and do not have our equipment. Details regarding the Workshop objectives, agenda, location, and speaker can be found on the attached flyer. Please note that the workshop is free and registration is requested online by August 31, 2012 at the website: http://www.surveymonkey.com/s/FPQLZPQ Regards, SNF Staff and Plasma-Therm
Process Clinic today @11
Hi all --
Just a reminder of the Process Clinic, today, at 11 am in the cube area
near Maureen's office. Bring process questions, process run sheets,
mask layouts, etc. Staff will be on hand to brainstorm ideas. (After
the Badger presentation in the Auditorium at 10 am.)
Your SNF Staff
Just a reminder of the Process Clinic, today, at 11 am in the cube area
near Maureen's office. Bring process questions, process run sheets,
mask layouts, etc. Staff will be on hand to brainstorm ideas. (After
the Badger presentation in the Auditorium at 10 am.)
Your SNF Staff
Wednesday, September 5, 2012
Reminder: Coral software information update meeting (Badger)
Just a reminder of the update tomorrow. See below.
Regards, John
-------- Original Message --------
Regards, John
-------- Original Message --------
| Subject: | Coral software information update meeting (Badger) |
|---|---|
| Date: | Mon, 20 Aug 2012 13:06:42 -0700 |
| From: | John Bumgarner <jwb2005@stanford.edu> |
| To: | labmembers@snf.stanford.edu |
Hello all, Stanford has invested significantly in producing an upgraded version of Coral lab management software, now called Badger. SNF is planning to convert to this during the winter shutdown. Badger maintains a similar look to Coral and the same functionality, but with some improvements. I have asked Michael Bell to provide an introduction and update to all the interested lab members on Sept 6 at 10 am in the AllenX conference room, 101X. Please attend if you want to learn more. Regards, John
Sunday, September 2, 2012
Saturday, September 1, 2012
Urgent need of silicon <111> wafer
Hi,
We are in urgent need of <111> 4-inch silicon wafers in next few days. Either N- or P-type wafers would work. If anybody has some spare ones and willing to give us, we will be very grateful. We can pay for the wafers or order some more.
Please dont hesitate to contact me at 650-714-4565 or to reply to this e-mail if you can help us with the wafers.
Best Regards
Ashish
We are in urgent need of <111> 4-inch silicon wafers in next few days. Either N- or P-type wafers would work. If anybody has some spare ones and willing to give us, we will be very grateful. We can pay for the wafers or order some more.
Please dont hesitate to contact me at 650-714-4565 or to reply to this e-mail if you can help us with the wafers.
Best Regards
Ashish
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