Monday, November 30, 2009

Reminder: SNF New Equipment Meeting, Wed. 12/2, 10 am (note date correction)

Greetings all:


Labmembers, PI's and research advisors are invited to an SNF Community
meeting in which plans for new equipment acquisitions will be
discussed. This meeting will be held on Wednesday, December 2, from 10
am- noon in the CISX Auditorium.


As you may have heard, as part of the NNIN, SNF has received some
funding to support new tools. Our proposal requested funding for tools
on the SNF Faculty/Industrial AdCom wishlist. The tools that were funded
are: ALD, Ebeam evaporator, sputter deposition, and PECVD. Over the
past several months, a small group of SNF staff and labmembers have been
meeting to explore the commercially available equipment options and
solicit ideas from research groups. At this meeting, the New Equipment
Group will present a summary of options, the trade-offs, and
advantages/disadvantages of different approaches for each tool. Your
participation and input are appreciated in helping to shape the final
decisions. We ask interested research groups to make sure you are
represented. Presentation slides will be posted on the wiki before the
meeting and linked from the SNF home page. The agenda is as follows:


10-10:30 - ALD (J Provine)
10:30-11- Ebeam evaporator (Ed Myers)
11-11:30 - Sputter system (Ed Myers)
11:30-12 - PECVD (Jim McVittie)


Feedback and discussion outside this meeting is also encouraged. Please
feel free to contact any of us.


The New Equipment Group (Tom O'Sullivan, J Provine, Ed Myers, Jim
McVittie, John Shott, Mary Tang)

Comment p5000etch SNF 2009-11-30 15:00:47: Ch.A heat ex fault update

Ch.A is OK to use but etch rate might have changed. If you are not using the end point in your recipe, please run an etch rate test before committing your actual devices.
We temporarily bypassed the flow sensor in order to make the chamber functional. There is actual flow through the cooling lines but it is just slightly just below the fllow threshold. The plan is to change the heat exchanger pump on Wed.

Re: Problem p5000etch SNF 2009-11-27 20:43:26: Grassing with Ch.C POLY ETCH

Grassing eliminated after user ran several plasma cleans.

Re: Problem p5000etch SNF 2009-11-27 19:00:31: Ch.B may have broken wafer in it

Opened the chamber and did not find any signs of a wafer. Ran 4 wafers (He leak rate < 2 sccm).

Lost Earring found in Cleanroom - not the Gowning Room

Dear All,

 

If you have lost an earring sometime in the Cleanroom please come by my cubicle and claim it.  I am in cubicle #41 on the first floor of the Paul Allen Building.

 

Thanks,

 

Maureen

 

Maureen Baran

Stanford Nanofabrication Facility

Lab Services Administrator

mbaran@stanford.edu

650-725-3664

 

Re: Shutdown p5000etch SNF 2009-11-29 22:21:42: Heat exchanger problem

Wall heat exchanger (amat 0) is OK. Problem is with CH.A heat exchanger. Need to replace Ch.A heat ex pump. Ch.B and C are OK. Ran 4 wafers through each chamber with no problem.

Process Clinic, Monday (today), 2 pm

Greetings labmembers --


Just a reminder of the Process Clinic today at 2 pm, in the cubicle area
outside Maureen's office. Bring your process ideas, process questions,
and device layouts for an open brainstorming session.


Your SNF staff

--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu

Sunday, November 29, 2009

Saturday, November 28, 2009

Friday, November 27, 2009

Comment p5000etch SNF 2009-11-27 22:12:57: Ran chamber clean on Ch.C

Used 4 wafers to clean Ch.C with the CH.C CLEAN recipe. The "rings" on the wafer look clean.

Problem p5000etch SNF 2009-11-27 20:43:26: Grassing with Ch.C POLY ETCH

I think the chamber may need a clean

Problem p5000etch SNF 2009-11-27 19:01:48: Wafer stuck in chamber B

Failed due toHe leak rate too high fault in chamber B.
Rik and me tryed to get it out ,but looks like wafer is broken inside.
Pradeep

Problem p5000etch SNF 2009-11-27 19:00:31: Ch.B may have broken wafer in it

Previous users wafer got stuck with a "He leak rate too high" error during the pump step. "Return wafers to cassette" did not return the wafer even though blade went into the chamber. Please do not use Ch.B until maintenance gets a chance to examine the system.

Using USB memory sticks on the SunRays ....

SNF Lab Members:

Rostam asked me how to transfer files to/from memory sticks on the
SunRays. I suspect that more than a few of you may be interested in
that answer, so I will post it here. It turns out that it is quite
simple .... but only if you know where to look for the files. In fact,
we've added some features that should mount and show the files on your
Memory Stick automatically.

First, login to the SunRay that you want to use .... before your insert
your memory stick.

Second, insert your memory stick into one of the 4 USB slots in the back
of the SunRay. This is actually the trickiest part as there are 4
closely spaced USB slots and two of them are in use with the keyboard
and mouse.

Depending on the size of the memory stick (the SunRays only have a USB
1.1 connection, I think ....) you will soon see a File Browser window
open that contains the contents of your USB device. If you have a
high-capacity memory stick, this may take a minute or two .... and the
LED on your memory stick will likely be flashing as it figures out what
is already on that device. In the top bar of the File Browser you will
also see the name of the directory in which those files are mounted.
That will be something like:
/tmp/SUNWut/mnt/${user_name}/${memory_stick_name}. In other words, if
your login name is johndoe and the name of your memory stick is
MyFlashDrive, then all of your files will be visible in the directory
/tmp/SUNWut/mnt/johndoe/MyFlashDrive. If you have not actually given
your flash drive a name, it will appear in the directory named "noname"
.... in other words /tmp/SUNWut/mnt/johndoe/noname.

You can either use the GUI-based File Browser to copy files from your
memory stick to some where in your home directory or can also copy files
from your home directory to your memory stick.

Of course, you can also open up a command window and use the Unix copy
command to copy files to/from your memory stick.

For example, to copy a file named MyFile.txt from your home directory to
your memory stick named MyFlashDrive you could issue the command:

cp ~/MyFile.txt /tmp/SUNWut/mnt/${user_name}/MyFlashDrive

where, of course, ${user_name} is replaced by your login name.

Alternatively, one way to copy a file named SomeOtherFile.txt from your
flash drive named AnotherThumbDrive to your home directory would be to
issue the command:

cp /tmp/SUNWut/mnt/${user_name}/AnotherThumbDrive/SomeOtherFile.txt ~

If you are unfamiliar with Unix, the tilde character "~" is an alias for
"my home directory". So, ~/SomeDirectory/SomeFile.txt is a way of
naming the file SomeFile.txt that is in the directory named
SomeDirectory in your home directory.

In any event, I'm hopeful that you'll find this improved access to
moving files onto or off of the SunRays with a USB.

Note: when you are done with your USB memory stick, you simply have to
remove it.

Remember, if you have a big memory stick and it is quite full, it will
take a while for this to open up on your desktop because the peak read
rate of USB 1.1 is only 12 Mb/second (which is 1.5 MB/second) using the
standard conventions of Mb = mega-bit and MB = mega-byte.

Let me know if you have any questions or problems,

John

Wednesday, November 25, 2009

Labmember Meeting on New Equipment: Wed. 12/1, 10-12

Greetings all:


Labmembers, PI's and research advisors are invited to an SNF Community
meeting in which plans for new equipment acquisitions will be
discussed. This meeting will be held on Wednesday, December 2, from 10
am- noon in the CISX Auditorium.


As you may have heard, as part of the NNIN, SNF has received some
funding to support new tools. Our proposal requested funding for tools
on the SNF Faculty/Industrial AdCom wishlist. The tools that were funded
are: ALD, Ebeam evaporator, sputter deposition, and PECVD. Over the
past several months, a small group of SNF staff and labmembers have been
meeting to explore the commercially available equipment options and
solicit ideas from research groups. At this meeting, the New Equipment
Group will present a summary of options, the trade-offs, and
advantages/disadvantages of different approaches for each tool. Your
participation and input are appreciated in helping to shape the final
decisions. We ask interested research groups to make sure you are
represented. Presentation slides will be posted on the wiki before the
meeting and linked from the SNF home page. The agenda is as follows:


10-10:30 - ALD (J Provine)
10:30-11- Ebeam evaporator (Ed Myers)
11-11:30 - Sputter system (Ed Myers)
11:30-12 - PECVD (Jim McVittie)


Feedback and discussion outside this meeting is also encouraged. Please
feel free to contact any of us.


The New Equipment Group (Tom O'Sullivan, J Provine, Ed Myers, Jim
McVittie, John Shott, Mary Tang)

Tuesday, November 24, 2009

Re: Problem p5000etch SNF 2009-11-24 16:48:59: Ch.B offline

Put chamber b online.

Problem p5000etch SNF 2009-11-24 16:48:59: Ch.B offline

getting an error that ch.b is offline

webcams in SNF cleanroom for educations activities

SNF Labmembers,

You may have noticed that we have recently placed some webcameras inside
the cleanroom. There are 9 of them, mostly aimed down hallways. The
primary use of these will be for education activities as outlined below.
As education director of SNF, along with Maurice Stevens and Uli
Thumser, I have developed remote access activities using webcameras in
the past, mostly utilizing a single, Sony network camera, to transmit
video images into classrooms from the cleanroom as part of NNIN/NSF
education programs. I've also worked with Georgia Tech, another NNIN
member, who has 14 webcams in their cleanroom
(http://grover.mirc.gatech.edu/cameras/) which we have also utilized
jointly for similar education activities, and which has been very
successful. We now have decided to do similar education activities with
fixed webcams in SNF. A common scenario is to give guided tours through
the cleanroom, with Maurice or Uli for example going from room to room
while talking by telephone to students in their classrooms while they
watch and interact with Maurice through the image on a browser. We also
will use them in conjunction with the Sony cam to do AFM and SEM demos,
as well as other processing equipment. We also can use this to give lab
tours to students in the Linvill conference room (101) rather than
gown-up tours, which are very disruptive and difficult, or window tours,
in which the students can not see much anyway.

The webcam images are password protected, and would not be available to
anyone except the students watching the remote activities on that day,
and associated staff members such as myself.

In certain situations, the webcams may also provide a benefit from a
safety perspective. If alarms go off or we experience an earthquake, for
example, senior staff would be able to do a quick check of cleanroom,
even from home if necessary, in order to gain more information on what
is occurring. Again, the images would not be available to anyone except
a few SNF staff members through the password-protected interfaces.

We will not be recording the images, except perhaps during education
activities and only for those education purposes. We will not be using
the webcams for surveillance, etc.

We ask that you do not move our webcams. And do not think that you are
being watched all the time - we will only be looking at the images
during education activities, or for testing, or during safety-related
situations.

So in summary:
- 9 webcams are now in the cleanroom
- They will be used for education and safety-related situations only.
- The images are password protected and will only be viewed during
education activities, testing for those activities, and during
safety-related situations, such as when alarms go off.
- Please do not touch or move the webcams, or change their viewing
direction.

- If you have any questions, contact me, Mike Deal, SNF Education
Director, 5-3607, mdeal@stanford.edu.
-Thanks -Mike Deal, SNF

Re: Problem p5000etch SNF 2009-11-23 17:43:55: Helium Pressure deviation Fault

Replaced Ch.B's vacuum pump. The Helium cooling uses chamber B's pump to control the backside pressure.

Re: Problem p5000etch SNF 2009-11-23 16:03:07: Ch. A

Replaced Ch.B's vacuum pump. The Helium cooling uses chamber B's pump to control the backside pressure.

Re: Comment p5000etch SNF 2009-11-23 20:14:31: cleared Rik's wafer, but Ch B is down

Replaced the vacuum pump. Cycled 4 wafers with no problems.

Re: Shutdown p5000etch SNF 2009-11-23 18:42:43: Wafer stuck

Replaced the vacuum pump. Cycled 4 wafers with no problems.

Monday, November 23, 2009

Comment p5000etch SNF 2009-11-23 20:14:31: cleared Rik's wafer, but Ch B is down

Ch B has lost its roughing pump. Offline.....

Shutdown p5000etch SNF 2009-11-23 18:42:43: Wafer stuck

Got He supply deviation error before wafer even loaded into CH.B. After that, system got stuck at "trying to transfer wafer into Chamber B".
Wafer is currently on robot arm.

Problem p5000etch SNF 2009-11-23 17:43:55: Helium Pressure deviation Fault

Out of disk space ....

SNF Lab Members:

We all need to clean up some disk space .... flare is at 100% disk usage
and bad things begin to happen then including coral not being able to
start and run. We've only got about 300 MB (out of close to 60 GB ....)
left.

If you want to see where you may be using a significant amount of space,
in a command window you can issue the command:
'du -sk *'
which will give you a high-level summary in kilobytes of your usage.

Here is the current list of "big users" that are most likely be able to
quickly save us some space:

1311003 /export/home/User/mahnaz
1078027 /export/home/User/eenriquez
779022 /export/home/User/maurice
567168 /export/home/User/gyama
487378 /export/home/User/jperez
430244 /export/home/User/chen0622
427871 /export/home/User/pnataraj
387494 /export/home/User/mvikram
384895 /export/home/User/gunjim
370207 /export/home/User/rostam
341916 /export/home/User/vossough
332442 /export/home/User/akhan
327212 /export/home/User/bchui
322212 /export/home/User/popomoo
312744 /export/home/User/true
305345 /export/home/User/sbiaa
288537 /export/home/User/mislam
281780 /export/home/User/naiqian
270251 /export/home/User/ywidjaja
267089 /export/home/User/mcherry
252087 /export/home/User/lwchang
240674 /export/home/User/takuyan
235379 /export/home/User/vlordi
219268 /export/home/User/chongxie
212617 /export/home/User/rparsa
212200 /export/home/User/dinhthuc
207730 /export/home/User/mtan
206902 /export/home/User/king
205132 /export/home/User/benc
200431 /export/home/User/nppatil
200426 /export/home/User/gladys
195756 /export/home/User/gth
193887 /export/home/User/cmfaulkn
191357 /export/home/User/alsune
187651 /export/home/User/mcvittie
178836 /export/home/User/dgunning
178411 /export/home/User/kosarb
174304 /export/home/User/iwjung
173953 /export/home/User/ericp
171124 /export/home/User/sjkramer
168781 /export/home/User/jtsai
167808 /export/home/User/vishal
167245 /export/home/User/ajamo
167006 /export/home/User/dton
166899 /export/home/User/altug
166271 /export/home/User/cbaxter
164990 /export/home/User/sigari
164529 /export/home/User/junjun
163149 /export/home/User/renshen
160616 /export/home/User/lindaw
160601 /export/home/User/hphan
160060 /export/home/User/korgan
158866 /export/home/User/nharjee
155948 /export/home/User/dlieberm
151849 /export/home/User/chion
150545 /export/home/User/mdickey
148465 /export/home/User/ludwig
148016 /export/home/User/sdogbe
144905 /export/home/User/jfoster
142833 /export/home/User/mrlin
142767 /export/home/User/cbellew
141970 /export/home/User/jleu
139284 /export/home/User/cursive
137622 /export/home/User/sjinpark
135076 /export/home/User/joongsun
135040 /export/home/User/riteshj
134513 /export/home/User/ahazeghi
133133 /export/home/User/kimsangb
132105 /export/home/User/kokab
131247 /export/home/User/masaharu
130647 /export/home/User/faridz
128292 /export/home/User/fanpy
128069 /export/home/User/oliversw
128044 /export/home/User/dalyx
127669 /export/home/User/mferrier
127437 /export/home/User/maryamzm
126825 /export/home/User/muchiao
126797 /export/home/User/whlee
126252 /export/home/User/jennyhu
125850 /export/home/User/bwacker
125783 /export/home/User/grupp
123481 /export/home/User/kghadiri
123316 /export/home/User/mmessana
123262 /export/home/User/yoavb
122936 /export/home/User/cmcg
122402 /export/home/User/laurahughes
121761 /export/home/User/tdo
121692 /export/home/User/skoh
120803 /export/home/User/insun
119966 /export/home/User/till
119297 /export/home/User/druist
119150 /export/home/User/zguo
119139 /export/home/User/ginel
118284 /export/home/User/jwc
118195 /export/home/User/latta
118089 /export/home/User/wanki
118055 /export/home/User/axiu
117102 /export/home/User/xzhuan1
116656 /export/home/User/jackson
116523 /export/home/User/ylinn
116171 /export/home/User/mtang
114717 /export/home/User/chienyuc
114264 /export/home/User/haniff
114062 /export/home/User/chingmei
113911 /export/home/User/ofidaner
113701 /export/home/User/ahryciw
113591 /export/home/User/hopcroft
113382 /export/home/User/slatif
112774 /export/home/User/wstonas
112484 /export/home/User/svo
111932 /export/home/User/kupnik
111136 /export/home/User/jcdoll
110999 /export/home/User/ocakkaya
110622 /export/home/User/yoonjin
109481 /export/home/User/jimkruger
109406 /export/home/User/patlu
109329 /export/home/User/pponce
108733 /export/home/User/jhaydon
108369 /export/home/User/jerabek
108249 /export/home/User/mccord
108075 /export/home/User/liangjl
107656 /export/home/User/mnakamura
105356 /export/home/User/tberg
105173 /export/home/User/bork
104309 /export/home/User/ryw
104246 /export/home/User/dhum
103569 /export/home/User/vilanova
103294 /export/home/User/sgchong
102971 /export/home/User/haiwei
102968 /export/home/User/shuluc
102917 /export/home/User/grahamab
102804 /export/home/User/swalker
102068 /export/home/User/malekos
102014 /export/home/User/wasserbauer
101936 /export/home/User/johana
101830 /export/home/User/kevina1
101218 /export/home/User/zeost
100301 /export/home/User/sbasumal

Deleting a little text file here and there doesn't really help ....

However, if you've got things like downloaded audio and video files ....
those should be dumped. If you've got locally installed versions of
software that is available elsewhere ... that should be dumped, etc.

Thanks for your help,

John

Problem p5000etch SNF 2009-11-23 16:03:07: Ch. A

the process went well at beginning and after a few trial error message: "He supply pressure deviation fault" occurs
unable to process further

Re: Problem p5000etch SNF 2009-11-21 15:20:23: Chamber A

Ran 4 wafer using Ch.A timed recipe + one wafer using the user's recipe with no problems. He cooling leak rate ~ 1.3 sccm.

Re: Problem p5000etch SNF 2009-11-23 03:16:14: Ch.B error message

Fully opened the filter isoslation valve (it was partially closed) and restarted the pump.

Re: Problem p5000etch SNF 2009-11-23 10:23:08: helium pressure errors for chamber a & c

Repaired broken wires in the He manometer connector. Ran 4 wafers with no problems.

Re: Shutdown p5000etch SNF 2009-11-23 11:19:00: Bad He press manometer

Repaired broken wires in the He manometer connector. Ran 4 wafers with no problems.

Shutdown p5000etch SNF 2009-11-23 11:19:00: Bad He press manometer

Backside Helium cooling manometer is defective.

Problem p5000etch SNF 2009-11-23 10:23:08: helium pressure errors for chamber a & c

chamber b already down with a turbo pump problem.
chambers a and c are currently erroring for all wafers including new, clean ones due to helium pressure errors.

Problem p5000etch SNF 2009-11-23 03:16:14: Ch.B error message

When I walked in, it was alarming. Here's the error message:
ChB wet pump overtemp or dry pump N2 purge incorrect.

Saturday, November 21, 2009

Problem p5000etch SNF 2009-11-21 15:20:23: Chamber A

He pressure flustration failure... cannot process

Friday, November 20, 2009

Countdown to lab cleanup!

Greetings labmembers --


Four week warning. Remember, the annual lab shutdown starts in Wednesday, Dec.
16, at 7 am and is accompanied by the Annual Lab Cleanup.


Starting then, any personal items in the cleanroom not inside a storage
bin will be removed from the lab. So save yourself the New Year ritual
of sifting through dozens of boxes of stuff to find your wafers or
notebook -- start collecting your personal items now!


Speaking of items in the lab, some of the WIP racks are piled up higher
than is considered safe. Please remove any items that are not being
actively processed -- or staff will begin removing them, starting with
unlabeled or undated/aged items. We won't wait for the shutdown to
start cleaning up the WIP racks. Remember, WIP stands for "Work in
Progress" not "Work in Permanence".


Finally, make sure to label storage containers kept in the CAD room
(151). Storage bins must be transparent and labeled with an active
Coral ID and current date. Unlabeled, undated, boxes and boxes older than one
year WILL BE removed and dispositioned.


Thanks for your attention --

Your SNF Staff


--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu

PhD Orals: Filip Crnogorac, FRIDAY 1pm, Clark Auditorium

Friendly reminder,

Please join me for my defense on TODAY, 1pm at Clark Auditorium.
Looking forward to seeing you there,
Filip

------------------------------------------------------------------
"Semiconductor Crystal Islands for 3-Dimensional Integration"

Stanford University PhD Dissertation Defense

Filip Crnogorac (filip@stanford.edu)
Research Advisor: R. Fabian W. Pease
Department of Electrical Engineering

Time: Friday, November 20th, @ 1:00 pm
(refreshments served at 12:45 pm)

Location: Clark Center Auditorium
(Basement, entrance across from Nexus)

ABSTRACT

The critical operation needed to achieve 3-dimensional integrated
circuits is obtaining single-crystal, device-quality semiconductor
material on upper circuit layers without damaging circuits below
(400°C temperature limit). Simulation shows that microsecond pulse
532nm Nd:YAG laser can melt and crystallize amorphous Si or Ge layers
without heating the circuit layers underneath. However, experimental
results of unseeded (graphoepitaxy) and seeded (RMG) crystallization
of Si and Ge indicate that much longer pulse lengths are required for
high quality single crystal formation, rendering the approach not 3DIC
compatible.

A more straightforward approach is to directly attach high quality
crystal islands for upper layer device fabrication. A variety of
viable low-temperature (≤400°C) bonding methods have been
investigated: fusion bonding (SiO2-SiO2, Si-SiO2, Ge-SiO2), thermo-
compressive bonding (Cu-Cu, Ti-Ti), as well as AlGe eutectic bonding.
The unique advantages of AlGe technique for 3DICs are reported for the
first time. They include superior bond strength, low void formation,
no roughness requirement, use of thin films and CMOS friendly
materials. Finally, we present a full 3DIC compatible process of
obtaining single crystal Si or Ge islands for upper layer device
fabrication via SmartCut(TM) and CMP finish.

------------------------------------------------------------------

Thursday, November 19, 2009

Lost a laptop power adaptor

Dear all,
 
I lost a laptop power adaptor a week ago, presumably, in CISX 338.
It's a black IBM/Lenovo adaptor.
If you have seen it or kept it, please email me back.
I really appreciate it.
 
Thanks,
Byoungil

Wednesday, November 18, 2009

Re: Comment p5000etch SNF 2009-10-23 16:29:27: CH C Etch Rate Qual

Archived

Re: Comment p5000etch SNF 2009-10-23 16:14:17: CH B Etch Rate Qual

Archived

Re: Comment p5000etch SNF 2009-10-23 16:08:45: CH A Etch Rate Qual

Archived

Re: Comment p5000etch SNF 2009-10-21 11:31:13: Ch.A wet clean

Archived

Re: Comment p5000etch SNF 2009-11-17 14:34:20: Update Ch.C He problem

Archived

Re: Comment p5000etch SNF 2009-11-18 09:16:33: Ch.C is down for He flow

Adjusted the He cooling bypass flow. Now when He press is set at 4 Torr, He flow is about 9 sccm (was 0.1 sccm). @ 8 Torr, He flow ~ 20 sccm. Ran 20 wafer through both Ch.C and Ch.B with no problems.

Re: Problem p5000etch SNF 2009-11-17 07:17:00: CH C Helium supply pressure

Adjusted the He cooling bypass flow. Now when He press is set at 4 Torr, He flow is about 9 sccm (was 0.1 sccm). @ 8 Torr, He flow ~ 20 sccm. Ran 20 wafer through both Ch.C and Ch.B with no problems.

Nanosociety Meeting Friday @ 12pm, McCullough 115: Lateral Fusion of Lipid Membranes to Nanoscale Functionalized Posts

Ben Almquist (Melosh Group) will be presenting his research involving "biomimetic stealth probes" at 12pm in McCullough 115 this Friday. Pizza will be served.


Lateral Fusion of Lipid Membranes to Nanoscale Functionalized Posts

The ability to specifically and non-destructively incorporate inorganic structures into or through biological membranes is essential to realizing full bio-inorganic integration. However, molecular delivery and interfaces to inorganic objects, such as patch-clamp pipettes, generally rely upon destructive membrane holes and serendipitous adhesion, rather than selective penetration and attachment to the bilayer. In fact, materials greater than a few nanometers have not been shown to penetrate lipid bilayers without disrupting the continuity of the membrane. I will discuss the development of nanofabricated probes that spontaneously insert into the hydrophobic membrane core by mimicking the hydrophobic banding of transmembrane proteins, forming a well-defined bio-inorganic lateral junction. These biomimetic 'stealth' probes consist of hydrophilic posts with 2-10 nm hydrophobic bands formed by molecular self-assembly, and are easily fabricated onto a variety of substrates including silicon wafers, nanoparticles, and AFM tips. By fabricating this architecture onto AFM probes, we have directly measured the penetration behavior and adhesion force of different molecular functionalities within the bilayer. Following insertion, stealth probes remain anchored in the center of the bilayer, while purely hydrophilic probes have no preferred location. The strength of the stealth probe adhesion varies greatly between short and long chain alkane functionalizations, indicating that chain mobility, orientation, and hydrophobicity all contribute to stability within the bilayer. In addition, the consequences of geometric factors such as band thickness and the presence of multiple bands on interface stability have been established. By selectively choosing the desired properties of the hydrophobic band, it is possible to tune the failure tension of the interface from values comparable to that of pristine lipid vesicles to only a fraction of the strength.

Comment p5000etch SNF 2009-11-18 09:16:33: Ch.C is down for He flow

During testing, Ch.C faulted for He valve not opening.

SVTC visit - Friday, 12/11, 2 pm

Wilbur Catabay, Vice President of Technology and Engineering, has invited SNF labmembers to visit and tour SVTC's San Jose facility on

                          Friday, December 11th
                                   2-5 pm
                                   SVTC
                          3901 N. First Street, San Jose  95134
                           

SVTC will present an overview of their technologies which include CMOS, MEMS, solar, memory, materials and others.   Wilbur and his team will also give tours of the facility.  This is an excellent opportunity to find out if SVTC is a good place for you to continue the project development which has been started at SNF.

In addition, SVTC will be offering internships for summer 2010 for Stanford students.  These internships will be discussed at the meeting.

If you are interested in this visit RSVP to Paul Rissman (rissman@stanford.edu) NO LATER THAN FRIDAY, DECEMBER 4th.

Tuesday, November 17, 2009

Re: SNF's Nitric Acid

Jason et al:

Yes, finding the concentration of JT Baker nitric acid does seem harder
than one would expect.

I'm pretty certain, however, that the concentration of the stuff that we
use is in the range of 69-70% with the balance being water.

Here is the link that provides those details:

http://mallinckrodtbaker.dirxion.com/jtbakermicroelectronics/WebProject.asp?BookCode=mal09flx#

The specific "version" that we us is product 9606-03 that is the 7 lb
bottles of CMOS grade nitric acid. The page on the link shows that the
concentration is 69-70% and also contains the information about particle
count in the bottles as well as concentrations of various contaminants.

Let us know if you have any further questions,

John

Comment p5000etch SNF 2009-11-17 14:34:20: Update Ch.C He problem

Did not have a chance to check the problem. We'll work on it tomorrow.

Re: Problem p5000etch SNF 2009-11-16 15:55:27: Ch A, 1st 2 wafers OK, next 2 He leak error

Ran 20 wafers using the Ch.A metal recipe with no problems. Cooling He leak rates were all < 1.8 sccm.

Re: Problem p5000etch SNF 2009-11-17 08:16:14: Wafer lost in CH B

Recovered user's wafer and placed in his wafer box (slot 15).
Cycled 20 wafers using Ch.B oxide recipe with no problems.

SNF's Nitric Acid

Hi labmembers,

Does anyone know what is the concentration of nitric acid stocked by SNF?  Seems like a basic question but I didn't see any clear descriptions on the bottle and the MSDS writes 50%-70%.  Thanks for your help in advance!

Thanks,
Jason

FW: REMINDER BioStores Fall Product Show TODAY

--++**==--++**==--++**==--++**==--++**==--++**==--++**==
stanfordbiostores mailing list
stanfordbiostores@lists.stanford.edu
https://mailman.stanford.edu/mailman/listinfo/stanfordbiostores

 

 

 

From: stanfordbiostores-bounces@lists.stanford.edu [mailto:stanfordbiostores-bounces@lists.stanford.edu] On Behalf Of Joseph Shackelford
Sent: Tuesday, November 17, 2009 7:34 AM
To: stanfordbiostores@lists.stanford.edu; biononexempt@lists.stanford.edu; bioexempt@lists.stanford.edu; biobargainingunit@lists.stanford.edu; biopostdoc@lists.stanford.edu; biomasters@lists.stanford.edu; biofacall@list.stanford.edu; biomainadmin@lists.stanford.edu
Subject: REMINDER BioStores Fall Product Show TODAY

 

Emacs! 

Joseph G. Shackelford
Manager Bio-Stores
Biology Department
Stanford University
650-723-9825 {office}
650-725-5783 {fax}

Problem p5000etch SNF 2009-11-17 08:16:14: Wafer lost in CH B

Wafer is lost during unloading

Problem p5000etch SNF 2009-11-17 07:17:00: CH C Helium supply pressure

Encountered the following error: CHC He supply pressure deviation error

Monday, November 16, 2009

Re: Cleaning after dry etching (Removal of Fluorine)

Jim,
 
I meant after using SF6 or CF4 gas in drytek1/2.
Let me know if you need further information.
 
Joongsun

On Mon, Nov 16, 2009 at 6:01 PM, Jim McVittie <mcvittie@cis.stanford.edu> wrote:
Joongsun,

Can you define what you mean by Fluorine contaminants? What etch process
are you coming from? When I know more about what you want, I may be able
to give you some info.

       Jim

On Mon, 16 Nov 2009, Joongsun Park wrote:

> Dear labmembers,
>
> Does anyone know how to clean samples after dry etching?
> I could observe a lot of Fluorine contaminants after etching. If anyone
> knows cleaning processes please let me know.
> Many thanks in advance.
>
> Best,
> Joongsun
>

--
--------------------------------------------------------------
James (Jim) P. McVittie, Ph.D.          Sr. Research Scientist
Paul G. Allen Building                  Electrical Engineering
Stanford Nanofabrication Facility       jmcvittie@stanford.edu
Stanford University                     Office: (650) 725-3640
Rm. 336X, 330 Serra Mall                Lab: (650) 721-6834
Stanford, CA 94305-4075                 Fax: (650) 723-4659



Re: Cleaning after dry etching (Removal of Fluorine)

Joongsun,

Can you define what you mean by Fluorine contaminants? What etch process
are you coming from? When I know more about what you want, I may be able
to give you some info.

Jim

On Mon, 16 Nov 2009, Joongsun Park wrote:

> Dear labmembers,
>
> Does anyone know how to clean samples after dry etching?
> I could observe a lot of Fluorine contaminants after etching. If anyone
> knows cleaning processes please let me know.
> Many thanks in advance.
>
> Best,
> Joongsun
>

--
--------------------------------------------------------------
James (Jim) P. McVittie, Ph.D. Sr. Research Scientist
Paul G. Allen Building Electrical Engineering
Stanford Nanofabrication Facility jmcvittie@stanford.edu
Stanford University Office: (650) 725-3640
Rm. 336X, 330 Serra Mall Lab: (650) 721-6834
Stanford, CA 94305-4075 Fax: (650) 723-4659

Cleaning after dry etching (Removal of Fluorine)

Dear labmembers,
 
Does anyone know how to clean samples after dry etching? 
I could observe a lot of Fluorine contaminants after etching. If anyone knows cleaning processes please let me know.
Many thanks in advance.
 
Best,
Joongsun

Problem p5000etch SNF 2009-11-16 15:55:27: Ch A, 1st 2 wafers OK, next 2 He leak error

Re: Comment p5000etch SNF 2009-11-04 11:38:50: ChB He leak rate fixed

Archived

Re: Comment p5000etch SNF 2009-11-09 13:50:24: Maintenance work

Archived

Re: Shutdown p5000etch SNF 2009-11-16 10:35:44: Broken wafer

Wafer broke in the Ch.B coor (slit valve). Cleaned chamber B and loadlock. Checked handling at atmoshphere with no problems. Cycled 8 wafers running the oxide etch recipe.

Re: Problem p5000etch SNF 2009-11-16 03:15:14: wafer stuck in Ch.B

Wafer broke in the Ch.B coor (slit valve). Cleaned chamber B and loadlock. Checked handling at atmoshphere with no problems. Cycled 8 wafers running the oxide etch recipe.

TODAY: Special Seminar - MEMS at DARPA - Prof. Tom Kenny 4:00pm Allen 101X

Special Seminar

Where:  Allen 101X
When:  4 PM on Monday November 16th

MEMS at DARPA.

Professor Tom Kenny will describe DARPA programs he has been involved
with, and comment on where things are and where they might be going.

PhD Orals - Filip Crnogorac, FRIDAY, Nov. 20; 1:00pm

Please join me for my defense on FRIDAY, 1pm at Clark Auditorium.
Looking forward to seeing you there,
Filip

------------------------------------------------------------------
"Semiconductor Crystal Islands for 3-Dimensional Integration"

Stanford University PhD Dissertation Defense

Filip Crnogorac (filip@stanford.edu)
Research Advisor: R. Fabian W. Pease
Department of Electrical Engineering

Time: Friday, November 20th, @ 1:00 pm
(refreshments served at 12:45 pm)

Location: Clark Center Auditorium
(Basement, entrance across from Nexus)

ABSTRACT

The critical operation needed to achieve 3-dimensional integrated
circuits is obtaining single-crystal, device-quality semiconductor
material on upper circuit layers without damaging circuits below
(400°C temperature limit). Simulation shows that microsecond pulse
532nm Nd:YAG laser can melt and crystallize amorphous Si or Ge layers
without heating the circuit layers underneath. However, experimental
results of unseeded (graphoepitaxy) and seeded (RMG) crystallization
of Si and Ge indicate that much longer pulse lengths are required for
high quality single crystal formation, rendering the approach not 3DIC
compatible.

A more straightforward approach is to directly attach high quality
crystal islands for upper layer device fabrication. A variety of
viable low-temperature (≤400°C) bonding methods have been
investigated: fusion bonding (SiO2-SiO2, Si-SiO2, Ge-SiO2), thermo-
compressive bonding (Cu-Cu, Ti-Ti), as well as AlGe eutectic bonding.
The unique advantages of AlGe technique for 3DICs are reported for the
first time. They include superior bond strength, low void formation,
no roughness requirement, use of thin films and CMOS friendly
materials. Finally, we present a full 3DIC compatible process of
obtaining single crystal Si or Ge islands for upper layer device
fabrication via SmartCut(TM) and CMP finish.

------------------------------------------------------------------

TiN deposition

Does anyone have experience with titanium nitride deposition? I'm also interested in dry etching TiN.

Thanks,
Jason

Shutdown p5000etch SNF 2009-11-16 10:35:44: Broken wafer

Broken wafer at chamber B door (slit valve)

Problem p5000etch SNF 2009-11-16 03:15:14: wafer stuck in Ch.B

error: slit valve did not close in max allowed time
attempted to recover wafer, but it gives robot rotation axis is moving error. Please recover wafer and place it in box. Thanks!

Sunday, November 15, 2009

Re: Problem p5000etch SNF 2009-11-13 10:33:16: Ch A, no He flow error

Vented chamber and found arcing on large lip seal o-ring,
changed large and smal lip seal o-rings and also wet cleaned
chamber.

Re: Problem p5000etch SNF 2009-11-13 08:45:18: Ch. B wet pump oil pressure bad

Backing pump was low on fombin oil, added 14/06 fomblin oil.

spin on doped glass

Hi,

If anyone uses spin on doped glass, I need some advise on the process flow.
Please get back to me.

Thank you!
Waqas Mustafeez
--------------------------------------------------------------
PhD Candidate,
Electrical Engineering,
Salleo Group: http://salleo.stanford.edu
Stanford University

Saturday, November 14, 2009

Reminder: Process Clinic, Monday, 11/16, 2-4 pm

Hi all --

Just a reminder of the next Process Clinic, scheduled for Monday, 11/16
at 2 pm in the cubicle area outside Maureen's office. Bring process
questions, runsheets, layouts, SpecMat requests. Staff will be on
hand. Experienced labmembers are especially welcome to help with
brainstorming solutions.

Your SNF Staff

Friday, November 13, 2009

Problem p5000etch SNF 2009-11-13 10:33:16: Ch A, no He flow error

TODAY! Student OSA/SPIE seminar -- Mario Paniccia, Intel Fellow, Fri 11/13, 3:15pm, Ginzton AP 200

Special Seminar

Bridging Photonics and Computing

 

Dr. Mario Paniccia

Intel Fellow

Director, Photonics Technology Lab

Corporate Technology Group, Intel Corporation

 

Friday, November 13, 3:15 PM, Applied Physics 200

Refreshments at 3:00 PM

Presented by the Stanford Student OSA/SPIE

 

Abstract:

The silicon chip has been the mainstay of the electronics industry for the last 40 years and has revolutionized the way the world operates. Today a silicon chip the size of a fingernail contains over one billion transistors and has the computing power that only a decade ago would take up an entire room of servers. Silicon photonics based mainly upon silicon on insulator (SOI) has recently attracted a great deal of attention since it offers an opportunity for low cost optoelectronic solutions for applications ranging from telecommunications down to chip-to-chip interconnects as well as possible applications in emerging areas such as optical sensing and biomedical applications.

 

Recent advances and research breakthroughs in silicon photonic device performance over last few years have shown that silicon can be considered as a material onto which one can build future optical devices. While significant efforts are needed to improve device performance and to “commercialize” these technologies, progress is moving at a rapid rate. If successful, silicon photonics may similarly come to dominate the optical communications as it has the electronics industry.

 

This keynote will provide overview of silicon photonics research at Intel Corporation, describe some of the recent advances in device performance and discuss the key building blocks needed for “siliconizing” photonics. In addition the presentation will provide an overview and discussion on potential applications and future opportunities for enabling “photonics” in and around the PC and platform. For more info: www.intel.com/go/sp

 

Dr. Mario Paniccia is an Intel Fellow and Director of the Photonic Technology Lab at Intel Corporation. Mario currently directs a research group focused in the area of Silicon Photonics. The team is developing silicon-based photonic building blocks for future use in enterprise and data center communications. Mario has worked in many areas of optical technologies during his career at Intel including optical testing for leading edge microprocessors, optical communications and optical interconnects. His team’s pioneering activities in silicon photonics have led to many firsts such as the first silicon modulator with bandwidth >1GHz (2004) and then the first at 40Gb/s (2007), the first continuous wave silicon laser breakthrough (2005) and, together with UCSB, the world’s first “Hybrid Silicon Laser” (2006). Mario has won numerous awards including being named one of the top 50 researchers by Scientific American in November 2004 for his team’s work in the area of silicon photonics. In October 2008 Dr Paniccia was named by R&D Magazine as “Scientist of the year.” He has published numerous papers, including 3 Nature papers, 3 book chapters, and has over 65 patents issued or pending. He is a senior member or IEEE and a Fellow of OSA. Mario earned a B.S. degree in Physics in 1988 from the State University of New York at Binghamton and a Ph.D. degree in Solid State Physics from Purdue University in 1994.

 

cid:image003.png@01CA625C.0DD4E5D0

 

 

Problem p5000etch SNF 2009-11-13 08:45:18: Ch. B wet pump oil pressure bad

Reports "Ch. B wet pump oil pressure bad or dry pump overtemp" and the chamber is not pumped down (turbo off).

Thursday, November 12, 2009

Post-doc opportunity at Environmental Molecular Sciences Laboratory

Dear Professors and Scientists,

If you know any qualified recent PhD student who is looking for a post-doc opportunity, please forward him/her the information posted at  http://www.emsl.pnl.gov/news/awards/post_doc.jsp

Thank you

Lax

Laxmikant Saraf, Ph.D.

Senior Research Scientist, EMSL

Pacific Northwest National Laboratory

K8-87, PO 999 3335 Q-Ave Richland WA 99352

Phone: (509)371-6508, Fax: (509)376-5106

URL: http://emslbios.pnl.gov/id/saraf_lv

Nanosociety Meeting Friday @ 12pm, McCullough 115: Tuning the shape of Semiconductor Nanowires for Advanced Photovoltaics

Jia Zhu (Cui Group) will be presenting his latest research on making  efficient nanostructured amorphous silicon solar cells at 12pm in McCullough 115. Pizza will be served.


Tuning the shape of Semiconductor Nanowires for Advanced Photovoltaics

Jia Zhu

Department of Electrical Engineering

Cui Group

 

Tuning the shape of nanostructures can have a strong effect on photon management and charge carrier collection for photovoltaics. Here we demonstrate two examples of nanowire shape designing: nanocones and branched nanowires.

Compared to uniform diameter nanowires, nanocones have been shown for absorbing light with much reduced reflection due to near perfect impedance match. One step further, we demonstrate a new concept of nanodome solar cells, with nanocone arrays as the center piece of this design. The nanodome solar cells will not only greatly reduce light reflection, but also efficiently couple light into propagating wave, which dramatically enhance light travelling path. This new design provides another approach to decouple the direction of light absorption and charge collection, but with much reduced surface area and material usage, compared to nanowire radial p-n junction structure. Amorphous Si solar cell was used as a demonstration of concept. Nanodome solar cells can absorb 46% more sunlight than flat film devices with the same thickness. We demonstrate nanodome devices with a power efficiency of 5.9%, which is 25% higher than flat film one. This nanodome design can be applied to a variety of other solar cell technologies.

PbSe nanocrystals have shown greatly enhanced multi exciton generation (MEG) effect, one important step toward third generation solar cells. However, it is difficult o extract generated carriers from nanocrystals without good transport pathways. Three dimensional branched nanowire, with strong quantum confinement within two dimensions, and the connected third dimension as an efficient charge carrier pathway, can be ideal for enhanced MEG effect, light absorption, and carrier collection. We demonstrate successfully a large area growth of PbSe Hyperbranced and Chiral Branched Nanowires on a variety of substrates. More interestingly, Chiral Branched Nanowires reveal a new nanowire growth mechanism, dislocation driven growth, which can be applied to a variety of materials.

 

 

 

 

Wednesday, November 11, 2009

Partial fume exhaust shutdown tomorrow morning ...

SNF Lab Members:

The main bearings on one of the two fume scrubbers are failing. A
shutdown of that scrubber has been set for tomorrow morning (Thursday,
Nov 12) from 7 to 11 a.m. to allow those bearings to be replaced.

During that time, fume exhaust will be reduced to about half of normal
levels. My recommendation would be to not perform any cleans or wet
etches that require heated chemicals while the exhaust is down.

Let me know if you have any questions or concerns.

We apologize for this inconvenience,

John

missing wafers in single 4" wafer trays

hi everyone,
a couple of wafers in single 4" wafer trays and a box of tweezers + scriber have disappeared.  they should be very easy to identify because all three items have "J Provine" on them and most have my phone number as well.  i'd appreciate any news that could lead to the retrieval of said items.
j

Tuesday, November 10, 2009

Student OSA/SPIE seminar-- Mario Paniccia, Intel, Fri 11/13, 3:15pm, Ginzton AP 200

Special Seminar

 

Bridging Photonics and Computing

 

Dr. Mario Paniccia

Intel Fellow

Director, Photonics Technology Lab

Corporate Technology Group, Intel Corporation

 

Friday, November 13, 3:15 PM, Applied Physics 200

Refreshments at 3:00 PM

Presented by the Stanford Student OSA/SPIE

 

 

Abstract:

The silicon chip has been the mainstay of the electronics industry for the last 40 years and has revolutionized the way the world operates. Today a silicon chip the size of a fingernail contains over one billion transistors and has the computing power that only a decade ago would take up an entire room of servers. Silicon photonics based mainly upon silicon on insulator (SOI) has recently attracted a great deal of attention since it offers an opportunity for low cost optoelectronic solutions for applications ranging from telecommunications down to chip-to-chip interconnects as well as possible applications in emerging areas such as optical sensing and biomedical applications.

 

Recent advances and research breakthroughs in silicon photonic device performance over last few years have shown that silicon can be considered as a material onto which one can build future optical devices. While significant efforts are needed to improve device performance and to “commercialize” these technologies, progress is moving at a rapid rate. If successful, silicon photonics may similarly come to dominate the optical communications as it has the electronics industry.

 

This keynote will provide overview of silicon photonics research at Intel Corporation, describe some of the recent advances in device performance and discuss the key building blocks needed for “siliconizing” photonics. In addition the presentation will provide an overview and discussion on potential applications and future opportunities for enabling “photonics” in and around the PC and platform.

 

For more info: www.intel.com/go/sp

 

 

Dr. Mario Paniccia is an Intel Fellow and Director of the Photonic Technology Lab at Intel Corporation. Mario currently directs a research group focused in the area of Silicon Photonics. The team is developing silicon-based photonic building blocks for future use in enterprise and data center communications. Mario has worked in many areas of optical technologies during his career at Intel including optical testing for leading edge microprocessors, optical communications and optical interconnects. His team’s pioneering activities in silicon photonics have led to many firsts such as the first silicon modulator with bandwidth >1GHz (2004) and then the first at 40Gb/s (2007), the first continuous wave silicon laser breakthrough (2005) and, together with UCSB, the world’s first “Hybrid Silicon Laser” (2006). Mario has won numerous awards including being named one of the top 50 researchers by Scientific American in November 2004 for his team’s work in the area of silicon photonics. In October 2008 Dr Paniccia was named by R&D Magazine as “Scientist of the year.” He has published numerous papers, including 3 Nature papers, 3 book chapters, and has over 65 patents issued or pending. He is a senior member or IEEE and a Fellow of OSA. Mario earned a B.S. degree in Physics in 1988 from the State University of New York at Binghamton and a Ph.D. degree in Solid State Physics from Purdue University in 1994.

 

cid:image003.png@01CA625C.0DD4E5D0

 

 

Warning: Lab Cleanup!

Greetings labmembers --


Just a reminder that the annual lab shutdown starts in Wednesday, Dec.
16, at 7 am and is accompanied by the Annual Lab Cleanup.


Starting then, any personal items in the cleanroom not inside a storage
bin will be removed from the lab. So save yourself the New Year ritual
of sifting through dozens of boxes of stuff to find your wafers or
notebook -- start collecting your personal items now!


Speaking of items in the lab, some of the WIP racks are piled up higher
than is considered safe. Please remove any items that are not being
actively processed -- or staff will begin removing them, starting with
unlabeled or undated/aged items. We won't wait for the shutdown to
start cleaning up the WIP racks. Remember, WIP stands for "Work in
Progress" not "Work in Permanence".


Finally, make sure to label storage containers kept in the CAD room
(151). Storage bins must be transparent and labeled with an active
Coral ID and current date. Unlabeled, undated, and boxes older than one
year are subject to removal.


Thanks for your attention --

Your SNF Staff

Re: Problem p5000etch SNF 2009-11-09 21:14:30: CH.B He rate too high error

Repositioned the wafer clamp. Ran 8 wafers with no problems. Backside He leakrate is ~ 1 sccm.

Re: linkCAD anyone?

I can also strongly recommend the layouteditor.
Drago

On Tue, Nov 10, 2009 at 9:56 AM, Chris Kenney <kenney@slac.stanford.edu> wrote:
You might also try the package "LayoutEditor", which
is a nice full layout editor and handles a variety of formats.
It runs on PCs, Mac OSX, Linux, ...

I believe the older versions are available for free. The newer
version costs a modest amount, especially for academic groups.

Here are two links:

http://www.layouteditor.net/

http://sourceforge.net/projects/layout/

Chris


On Tue, 10 Nov 2009, Mary Tang wrote:

Hi Larkhoon --


Do you mean GBR (one of the Gerber file formats)?  If so, one of the two desktop computers in the SNF CAD room (151) has LinkCAD (the one on the left side).  There are several versions/levels of LinkCAD, but the one we have has the capability to convert between the most common file formats (DXF, PS, GDSII, Gerber, CIF) as well as visualize the layout.  There are certain features which may require an administrative password -- just ask a staff member if you need it.  Info is posted above the computer.


Mary



Lark-Hoon Leem wrote:
Hi,

Does anybody have a copy of linkCAD software that I can use to convert my mask design file into GVR format?

Many thanks,
Larkhoon



--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA  94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu


Re: linkCAD anyone?

You can also download a fully functional trial version directly from their website:

http://www.linkcad.com/site/download

The trial version is only good for 5 days, but it will work if you want to convert a few files now.

Nathan

Re: linkCAD anyone?

You might also try the package "LayoutEditor", which
is a nice full layout editor and handles a variety of formats.
It runs on PCs, Mac OSX, Linux, ...

I believe the older versions are available for free. The newer
version costs a modest amount, especially for academic groups.

Here are two links:

http://www.layouteditor.net/

http://sourceforge.net/projects/layout/

Chris

On Tue, 10 Nov 2009, Mary Tang wrote:

> Hi Larkhoon --
>
>
> Do you mean GBR (one of the Gerber file formats)? If so, one of the two
> desktop computers in the SNF CAD room (151) has LinkCAD (the one on the left
> side). There are several versions/levels of LinkCAD, but the one we have has
> the capability to convert between the most common file formats (DXF, PS,
> GDSII, Gerber, CIF) as well as visualize the layout. There are certain
> features which may require an administrative password -- just ask a staff
> member if you need it. Info is posted above the computer.
>
>
> Mary
>
>
>
> Lark-Hoon Leem wrote:
>> Hi,
>>
>> Does anybody have a copy of linkCAD software that I can use to convert my
>> mask design file into GVR format?
>>
>> Many thanks,
>> Larkhoon
>>
>
>
> --
> Mary X. Tang, Ph.D.
> Stanford Nanofabrication Facility
> CIS Room 136, Mail Code 4070
> Stanford, CA 94305
> (650)723-9980
> mtang@stanford.edu
> http://snf.stanford.edu
>

Re: linkCAD anyone?

Hi Larkhoon --


Do you mean GBR (one of the Gerber file formats)? If so, one of the two
desktop computers in the SNF CAD room (151) has LinkCAD (the one on the
left side). There are several versions/levels of LinkCAD, but the one
we have has the capability to convert between the most common file
formats (DXF, PS, GDSII, Gerber, CIF) as well as visualize the layout.
There are certain features which may require an administrative password
-- just ask a staff member if you need it. Info is posted above the
computer.


Mary

Lark-Hoon Leem wrote:
> Hi,
>
> Does anybody have a copy of linkCAD software that
> I can use to convert my mask design file into
> GVR format?
>
> Many thanks,
> Larkhoon
>


--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu

linkCAD anyone?

Hi,

Does anybody have a copy of linkCAD software that
I can use to convert my mask design file into
GVR format?

Many thanks,
Larkhoon

Monday, November 9, 2009

Thursday, November 5, 2009

[Fwd: looking for lost purse]

Hi all --

Anyone seen something matching this description? If so, please let
Hyo-Seon know.


*******************************************************

I am active user in SNF. I have lost my purse... It was last friday. I
think I put it in my office in Ginzton, but it is possible to miss it
around SNF. If you get a lost purse or something, or if there is someone
else that I can ask about this lost item, please let me know..(The purse
is long, big one. Color is pink-like purple)


Thanks,

Hyo-Seon <hsyoon@stanford.edu>

--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu

Re: Shutdown p5000etch SNF 2009-11-05 08:01:36: Replacing the LL pump

Replaced the loadlock pump.

Shutdown p5000etch SNF 2009-11-05 08:01:36: Replacing the LL pump

Replacing the loadlock pump. It is very noisy.

Wednesday, November 4, 2009

Re: Comment p5000etch SNF 2009-11-01 08:49:37: Chamber B and C

Archive

Re: Problem p5000etch SNF 2009-11-02 23:40:00: Ch B Backside He

Adjusted wafer chamber hand-off position. Ran several wafer, leak rates were from 0.6 to 1.6 sccm.

Re: Problem p5000etch SNF 2009-11-02 23:37:18:

Comment p5000etch SNF 2009-11-04 11:38:50: ChB He leak rate fixed

Elmer adjusted waferpositioning in the chamber and backside He leak problem is fixed. Ran 6 wafers and leak rate is between 0.3-1.1sccm.

Tuesday, November 3, 2009

Reminder: MEMS Seminar: Microsystems Enabled Applications : PV, Tues. Nov 3 (TODAY), 4-5pm in Allen-101X

MEMS Seminar Announcement:
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Tuesday November 3, 2009 (TODAY)
4 - 5 pm
Allen-101X (formerly known as CISX-101)

Title:
Microsystems Enabled Applications : PV
Speaker: Murat Okandan, Ph.D. Principal Member of Technical Staff
Advanced MEMS Department
Sandia National Laboratories, Albuquerque, NM


Abstract:
Microsystems have been under development for many decades and have
found  applications in a wide variety of places.  Metrics for success
in these applications have been tied to improved performance, reduced
costs and enabling of new approaches rather than solely the smaller
size scale of the new devices.  This talk will briefly touch on some
of the new devices and microsystems that are being developed at
Sandia, such as devices for seismic monitoring, neural probes,
components of an artificial retina, ultra-fast shock sensors,
front-end CMOS integrated silicon nanowires and an atomic
magnetometer.  Another very exciting project, which at first look
would not benefit from microsystems approaches, is photovoltaics.  We
have been developing a new manufacturing approach based on
microsystems fabrication techniques which leverages the strengths of
crystalline silicon devices and has the potential to lower costs below
what is possible with standard crystalline silicon or thin film
manufacturing techniques while enabling new form factors and
deployment options.  And, there will be plenty of time available after
the seminar to talk about gliders and soaring.

Monday, November 2, 2009

Problem p5000etch SNF 2009-11-02 23:40:00: Ch B Backside He

Leak rate high alarm

Problem p5000etch SNF 2009-11-02 23:37:18:

Sample of SU-8 or HD-8820

Hello,

Can any one spare some SU-8 and developer for SU-8 or HD-8820 sufficient enough to coat 2-3 wafers at SNF?  The SU-8 thickness target is 10-20um and for HD-8820 is ~6-10um.

Thanks for your help.

Regards,

Usha

MEMS Seminar: Microsystems Enabled Applications : PV, Tues. Nov 3, 4-5pm in Allen-101X

MEMS Seminar Announcement:
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Tuesday November 3, 2009
4 - 5 pm
Allen-101X (formerly known as CISX-101)

Title:
Microsystems Enabled Applications : PV

Speaker:
Murat Okandan, Ph.D.
Principal Member of Technical Staff
Advanced MEMS Department
Sandia National Laboratories, Albuquerque, NM

Abstract:
Microsystems have been under development for many decades and have found applications in a wide variety of places. Metrics for success in these applications have been tied to improved performance, reduced costs and enabling of new approaches rather than solely the smaller size scale of the new devices. This talk will briefly touch on some of the new devices and microsystems that are being developed at Sandia, such as devices for seismic monitoring, neural probes, components of an artificial retina, ultra-fast shock sensors, front-end CMOS integrated silicon nanowires and an atomic magnetometer. Another very exciting project, which at first look would not benefit from microsystems approaches, is photovoltaics. We have been developing a new manufacturing approach based on microsystems fabrication techniques which leverages the strengths of crystalline silicon devices and has the potential to lower costs below what is possible with standard crystalline silicon or thin film manufacturing techniques while enabling new form factors and deployment options. And, there will be plenty of time available after the seminar to talk about gliders and soaring.

Vecco AFM Workshop in CISX Auditorium Thursday, Nov. 5th

All,

Vecco AFM will be holding a one day workshop on Thursday, Nov. 5th in
the Paul Allen auditorium, room 101X. Pre-registration is required
and the web link is listed on the announcement.

If you have any questions, you can contact Paul Charell at pcharell@veeco.com.

Regards,

Process Clinic today, Mon, Nov. 2, 2-4 pm

Hi all --

Just a reminder of the Process Clinic, today, Nov. 2, from 2-4 pm in the
cubicle area outside Maureen's office. Keith Best will join us to share
his ASML expertise frm 3 pm.

Your SNF Staff

Sunday, November 1, 2009

SU-8 - Solubility

Hi,

I would like to use SU-8 coating for passivating my device. Once cured, the passivation should withstand acetonitrile medium.  I am concerned since solvent based developers are used to develop SU-8.  Does anyone know if SU-8 dissolves in acetonitrile after curing?  Thanks in advance for your feedback.

Regards,

Usha

Re: Problem p5000etch SNF 2009-11-01 11:31:23: ChB Backside He

Vented chamber again and noticed one of the new small
lip seal and has a cracked on the edge. Changed small
lip seal and verified b/s he leak at 0.3sccm.

Problem p5000etch SNF 2009-11-01 11:31:23: ChB Backside He

Leak rate high alarm - should be <2/0sccm; is 7.1sccm; Checked back-side of wafers- no issues. Tested with 6 wafers w/o running RF. All wafers had high BSHe.

Comment p5000etch SNF 2009-11-01 08:49:37: Chamber B and C

Wet cleaned both chamber B and C, Please run condition
wafers before processing your regular wafer.
Cesar