Tuesday, February 22, 2011

[reminder] EE PhD Oral Examination Kyun-Hoae Koo, Wednesday, February 23, 2011, 2:00pm

Stanford University Ph.D. Dissertation Defense - Department of Electrical Engineering

 

Title: " Performance Comparison Study of Future On-Chip Interconnects for High Performance VLSI Applications"

 

Speaker: Kyung-Hoae Koo

Advisor: Krishna C. Saraswat

Date: Wednesday, February 23rd, 2011

Time: 2:00pm (refreshments served at 1:45 pm)

Location: CISX-101  Auditorium

 

Abstract :

-----------------------------------------------------------------------------------------------------------------------------------

Optical interconnects and carbon nanotubes (CNTs) present promising options for replacing the existing Cu-based global/semiglobal (optics and CNT) and local (CNT) wires. This work quantifies the performance of these novel interconnects and compare it with Cu/low-κ wires for future high-performance integrated circuits. For a local wire, a CNT bundle exhibits a smaller latency than Cu for a given geometry. In addition, by leveraging the superior electromigration properties of CNT and optimizing its geometry, the latency advantage can be further amplified. For semiglobal and global wires, we compare both optical and CNT options with Cu in terms of latency, energy efficiency/power dissipation, and bandwidth density. The new circuit scheme, i.e. “capacitively driven low-swing interconnect (CDLSI),” has the potential to effect a significant energy saving and latency reduction. This work also presents an accurate analytical optimization model for the CDLSI wire scheme. It is found that the CDLSI circuit scheme outperforms the conventional interconnects in latency and energy per bit for a lower bandwidth requirement, whereas these advantages degrade for higher bandwidth requirements.

 

 

No comments: