Sunday, August 31, 2008
Problem p5000etch SNF 2008-08-31 11:12:25: burned photoresist
Thursday, August 28, 2008
Re: LTO coverage in deep trenches
Some years ago, I did a bit of modeling and measurements of LTO deposition
profiles. LTO can be modeled pretty well with a constant sticking
coefficient (SC) of about 0.3. This means that you have about 3 brouces
off the side walls of your trench before it sticks. This does not lead to
good side wall coverage as you go deeper into the trench. TEOS, which is
doposited in the 700C range, give much better step coverage. As I recall,
TEOS can be modeled as a mixture of a conformal ( very low SC ) component
and a high SC ( range of 0.2) component. I am not in my office right now,
but I believe these two components were in the range of being so you will
get strong conformal deposition deep into your trench with TEOS. If you
want, I can send you some papers or some PhD dissertations on this work.
Jim
On Thu, 28 Aug 2008, Steve Zhuang wrote:
> Hello All,
>
> I am trying to find out if LTO has good conformal coverage in deep
> trenches. I have straight trenches are 30 um wide, and about 275 um
> deep, in a silicon wafer. I plan to deposit 0.5um LTO as an insulation
> layer over the side walls. Will this work? Your input will be highly
> appreciated.
>
> Thanks.
>
> Steve
>
> ----- Original Message -----
> From: "Kevin Crabb" <kcrabb@stanford.edu>
> To: labmembers@snf.stanford.edu
> Sent: Monday, August 25, 2008 4:25:56 PM GMT -08:00 US/Canada Pacific
> Subject: 6" wafers?
>
>
>
>
> Hello All,
>
> I have need for a total of three 6†wafers, and was wondering if anybody had any ‘extras’ they’re willing to share.  They are merely serving as a carrier for my samples which will be getting irradiated with cesium ions from an outside vendor.  I therefore do not care what the doping, resistivity, or thickness is, or even if there are oxide or nitride or other layers on top.  I only need full (non-broken) 6†wafers. (Heck, they don’t even have to be silicon, I don’t think.)  If anybody has any, I’d be much obliged. Thanks,
>
> Kevin
>
> kcrabb@stanford.edu
>
--
--------------------------------------------------------------
Jim McVittie, Ph.D. Senior Research Scientist
Allen Center for Integrated Systems Electrical Engineering
Stanford University jmcvittie@stanford.edu
Rm. 336, 330 Serra Mall Fax: (650) 723-4659
Stanford, CA 94305-4075 Tel: (650) 725-3640
LTO coverage in deep trenches
I am trying to find out if LTO has good conformal coverage in deep trenches. I have straight trenches are 30 um wide, and about 275 um deep, in a silicon wafer. I plan to deposit 0.5um LTO as an insulation layer over the side walls. Will this work? Your input will be highly appreciated.
Thanks.
Steve
----- Original Message -----
From: "Kevin Crabb" <kcrabb@stanford.edu>
To: labmembers@snf.stanford.edu
Sent: Monday, August 25, 2008 4:25:56 PM GMT -08:00 US/Canada Pacific
Subject: 6" wafers?
Hello All,
I have need for a total of three 6" wafers, and was wondering if anybody had any 'extras' they're willing to share. They are merely serving as a carrier for my samples which will be getting irradiated with cesium ions from an outside vendor. I therefore do not care what the doping, resistivity, or thickness is, or even if there are oxide or nitride or other layers on top. I only need full (non-broken) 6" wafers. (Heck, they don't even have to be silicon, I don't think.) If anybody has any, I'd be much obliged. Thanks,
Kevin
Wednesday, August 27, 2008
Re: Shutdown p5000etch SNF 2008-08-27 11:07:25: Wafer Stuck in Chamber B
Tuesday, August 26, 2008
FW: 2008-09 SNF Sponsorship Application and 2008-09 Parking Permit Application are Available
Dear Labmembers,
REMINDER: You need to have a new 2008-09 SNF Sponsorship form completed and filed with Parking and Transportation on or before Tuesday, September 2nd, 2008 (next Tuesday because Monday is a campus wide holiday)!
Clarification on who needs to fill out a 2008-09 Sponsorship form – ALL current Industrial Users and ALL current other Academic Users of SNF only. The ones that are exempt from having to fill out this form are current Stanford students because they are already sponsored by the University to be on campus.
Again, the 2008-09 SNF Sponsorship form and Parking Permit Application are hanging outside my cubicle for you to take.
Thanks,
Maureen
Maureen Baran
Stanford Nanofabrication Facility
Lab Services Administrator
650-725-3664
From: Maureen Baran [mailto:mbaran@stanford.edu]
Sent: Wednesday, August 20, 2008 10:22 AM
To: '
Subject: 2008-09 SNF Sponsorship Application and 2008-09 Parking Permit Application are Available
Importance: High
IMPORTANT: THE SPONSOR FORM MUST BE RENEWED ANNUALLY ON or BEFORE SEPTEMBER 1st.
Note: A parking ticket on Campus will cost you $35.00.
Dear Lab Members,
The 2008-09 SNF Department Sponsorship Application and Parking Permit Application are available. I have both these applications in a file hanging on the outside of my cubicle.
The 2008-09 Sponsorship Application must be filled out before I can have John Shott, Paul Rissman or Mary Tang sign off on it. Then you will need to bring it down to Parking and Transportation at 340 Bonair Siding and hand it in along with your completed 2008-09 Parking Permit Application (if this applies to you).
If you need any help in this matter please let me know.
Maureen
Maureen Baran
Stanford Nanofabrication Facility
Lab Services Administrator
650-725-3664
Monday, August 25, 2008
6" wafers?
Hello All,
I have need for a total of three 6” wafers, and was wondering if anybody had any ‘extras’ they’re willing to share. They are merely serving as a carrier for my samples which will be getting irradiated with cesium ions from an outside vendor. I therefore do not care what the doping, resistivity, or thickness is, or even if there are oxide or nitride or other layers on top. I only need full (non-broken) 6” wafers. (Heck, they don’t even have to be silicon, I don’t think.) If anybody has any, I’d be much obliged. Thanks,
Kevin
kcrabb@stanford.edu
One Found Earring outside the Lab
If you misplaced an earring this morning, while you were putting on your booties to enter the lab please stop by my cubicle and be prepared to describe it.
Thanks,
Maureen
Maureen Baran
Stanford Nanofabrication Facility
Lab Services Administrator
650-725-3664
Process Clinic today (Monday), 2-4 pm
Just a reminder -- there's a Process Clinic today, from 2-4 pm, just in
the office/cubicle area near Maureen's office. Keith Best from ASML
will be here to answer any 3D align questions (and questions on just
about anything else -- he's a wealth of information!) SNF staff will
also be on hand, with a SpecMat quorum (so bring your special materials
and new processes requests.) New labmembers are strongly encouraged to
use this as an opportunity to get help in laying out process flows or
device designs.
Hope to see you there!
Your SNF Staff
--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu
PhD Dissertation Defense for Hyejun Ra
University PhD Dissertation Defense
In vivo cellular imaging with MEMS scanners
Department of Electrical Engineering
Research Advisor: Professor O. Solgaard
Date: Wednesday, August 27, 2008
Time:
Location: CIS-X Auditorium, Center for Integrated Systems
Abstract:
The ability to image through tissue with high resolution in vivo enables non-invasive early cancer detection in humans and therapeutic research in live pre-clinical animal models. The dual-axes confocal (DAC) microscope architecture is proposed to miniaturize a tabletop microscope into a handheld or endoscope-compatible size. I will present the 2-D (two-dimensional) MEMS scanner that enables in vivo real-time imaging in the DAC configuration. It consists of a 2-D gimbal structure in double silicon-on-insulator (SOI) layers and is actuated by electrostatic vertical combdrives.
In the second part, I will present a handheld DAC microscope system where the MEMS scanner is aligned and integrated with miniature optics. Deep tissue imaging with 3-D reconstruction is demonstrated.
Finally, the application of the miniaturized DAC microscope in in vivo intravital imaging will be shown in therapeutic research of siRNA silencing in the skin.
Friday, August 22, 2008
PhD Oral Defense, Monday, Aug 25, 2 pm: Ignacio Zuleta
Where: Clark S361
What: PhD Oral Defense
Title: A HIGH SPEED MASS SPECTROMETER BASED ON MICROMACHINED ION OPTICS AND
POSITION SENSITVE DETECTION FOR THE MONITORING OF NON-STATIONARY PROCESSES
Abstract: As new chemical systems become of relevance, the question of how
to monitor their dynamics quickly comes to the fore. In the last few years,
chemical systems consisting of complex mixtures of biological molecules have
become the subject of intense research, requiring new tools to measure their
state. Two main families of techniques have been applied extensively to
these problems, spectroscopy and mass spectrometry. With the advent of soft
ionization techniques like ESI and MALDI, proteins, DNA and metabolite
mixtures can be analyzed using mass spectrometry. Even given these
successes, the problem of continuously monitoring a condensed phase chemical
system using mass spectrometry still proves very challenging, from the
sample introduction aspect to the ability of the analyzer to monitor
efficiently the stream of ions created. We have developed a number of
advances in this regard, consisting of methods to carry over continuous mass
spectrometry based on the continuous modulation of an ion beam. These
advances consist of ion optical devices and fabrication methods for the
modulation of ion beams, novel ion detection schemes and data processing. We
show that when all these elements are combined, real-time mass spectrometric
monitoring of chemical systems at very high spectral acquisition rates can
be achieved. In particular we demonstrate its application to the monitoring
of a number of non-stationary processes: liquid plugs of a given substance,
chemical imaging of a surface and protein folding kinetics.
--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu
Wednesday, August 20, 2008
2008-09 SNF Sponsorship Application and 2008-09 Parking Permit Application are Available
IMPORTANT: THE SPONSOR FORM MUST BE RENEWED ANNUALLY ON or BEFORE SEPTEMBER 1st.
Note: A parking ticket on Campus will cost you $35.00.
Dear Lab Members,
The 2008-09 SNF Department Sponsorship Application and Parking Permit Application are available. I have both these applications in a file hanging on the outside of my cubicle.
The 2008-09 Sponsorship Application must be filled out before I can have John Shott, Paul Rissman or Mary Tang sign off on it. Then you will need to bring it down to Parking and Transportation at 340 Bonair Siding and hand it in along with your completed 2008-09 Parking Permit Application (if this applies to you).
If you need any help in this matter please let me know.
Maureen
Maureen Baran
Stanford Nanofabrication Facility
Lab Services Administrator
650-725-3664
Re: Comment p5000etch SNF 2008-08-19 10:51:46: Ch.A is down
Tuesday, August 19, 2008
Re: How to catalog photoes or find it out easily?
I know you have taken a lot of photos, but:
Could you find your files easily and quickly?
Do you manage your files manual?
Is your file safty?
Why not to try a powerful management tools - <CD Secretary>?
<CD secretary> is a very useful tool to manage(catalog,find) movable media(such as CD,DVD,movable hard disk,zip disk or hard disk) in home,library,school,company,etc.
It can manage photo,picture,music,mp3 and other files easily.
Now, you can find it in the largest web site for download:
http://www.download.com/CD-Secretary-2008/3000-2141_4-10785228.html
or find rank from:
http://www.softpedia.com/progDownload/CD-Secretary-2008-Download-90009.html
Regards.
your friend from web.
2008-08-20 02:40:44
The following was written in chinese:
p5000etch-pcs:
您好,
出去游玩一定拍了很多照片,但
怎样才能轻松快速找到您想要的照片呢?
您还在手工一个一个翻阅吗?
放在电脑里面安全吗?
为什么不试试强大的管理工具呢-<照片光盘秘书>?
光盘秘书是一款优秀的光盘管理软件，它不仅能管理您众多的光盘，更能管理您各种各样的移动媒体甚至是您的硬盘，还能管理您公司中各种各样的文档。当然，用它来管理您各种各样的照片，图片，音乐，MP3等等文件自然是轻松搞定了。
现在,您可以在全球最大的下载站找到它:
http://www.download.com/CD-Secretary-2008/3000-2141_4-10785228.html
或者看看别人的评价:
http://www.softpedia.com/progDownload/CD-Secretary-2008-Download-90009.html
当然,不仅仅是照片啦,您需要管理的任何文件它都能做到.
您最好的朋友.
2008-08-20 02:40:44
Maskmaking Clinic, Wed. 8/20, 3 pm
Bill Martin will be here on Wednesday, Aug. 20, at 3 pm in CIS 101 with
tips and tricks on how to layout and specify a mask -- and how to fill
out a maskmaking form. He will also be on hand to answer your specific
questions about your mask files. (Bring your USB sticks with your GDSII
files!) For those who are interested, there will also be a brief
overview on LEdit.
Mary
--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu
Temperature/humidity control update ....
As of about 7 a.m. this morning, steam has been restored to the lab. As
a result, we now have the ability to control temperature and humidity in
the cleanroom and temperature and humidity are close to their normal range.
However, because the lab and tools in it were quite cold overnight
(16C/61F), anything with significant thermal mass will not be back to
operating temperatures for some time. In particular, I expect that this
will include the ASML and ebeam tools. Additionally, any room
temperature baths such as 50:1 HF and BOE baths will likely take a
couple of hours to get back to their normal daytime temperatures.
Please check each tool carefully before use and be extra vigilant in
looking for anamolous behavior.
We apologize for this extended outage but are doing our best to recover
as quickly as possible.
Thanks,
John
Shutdown p5000etch SNF 2008-08-19 03:27:43: Cl and HBr are off
Toxic Gas Alarm 8/19/08
This mornings Toxic Gas alarm was from a Chlorine signal coming from
the exhaust line of the P5000. While there was, and is a signal from
this sensor I could not find any indication on the other chlorine
sensors in the fab or on our portable system.
It is safe to re-enter the fab, I have left the Chlorine and HBr gas
boxes which provide these gases to the etch tools turned off.
The Chlorine for epi and epi2 should still be available.
When the full staff returns in the morning, we will do another
evaluation of the sensor and try and get the etch gases turned back on.
Regards,
Ed
Monday, August 18, 2008
Conditions update at 8:30pm Monday
56F and 63% humidity
Litho
59F and 60% humidity
--- On Mon, 8/18/08, Gary J Sosa <gsosa@stanford.edu> wrote:
> From: Gary J Sosa <gsosa@stanford.edu>
> Subject: Litho Area Conditions
> To: "labmembers@snf.stanford.edu" <labmembers@snf.stanford.edu>
> Date: Monday, August 18, 2008, 6:23 PM
> Hi All....
>
> Mary mentioned in her email that there is no steam
> generation at
> this time and that the lab feels cold. As of 6:00 PM the
> temperature
> near the SVG coaters was 63 degrees and the humidity was 61
> %. You may
> want to reconsider doing Litho tonight, until the
> temperature and
> humidity are at optimal conditions. The temp and humidity
> will have an
> affect on the photoresist and you may not get the results
> that you
> expect. Please be very cautious and take this into
> consideration so
> that you will not have to rework you wafers. There is a
> digital meter
> on the rack next to the SVG coaters. Typically the
> temperature is 70
> degrees and the humidity is around 42%. If steam generation
> does not
> come back online, conditions may get worse as the outside
> conditions
> change and the lab has no way to compensate.
>
> .. Gary
Litho Area Conditions
Mary mentioned in her email that there is no steam generation at
this time and that the lab feels cold. As of 6:00 PM the temperature
near the SVG coaters was 63 degrees and the humidity was 61 %. You may
want to reconsider doing Litho tonight, until the temperature and
humidity are at optimal conditions. The temp and humidity will have an
affect on the photoresist and you may not get the results that you
expect. Please be very cautious and take this into consideration so
that you will not have to rework you wafers. There is a digital meter
on the rack next to the SVG coaters. Typically the temperature is 70
degrees and the humidity is around 42%. If steam generation does not
come back online, conditions may get worse as the outside conditions
change and the lab has no way to compensate.
.. Gary
Lab now open again
The lab is now open again for business. Please make sure to check the
status on Coral and be extra careful on your regular system checkout
before starting -- not all tools are functional and with a hundred tools
in the lab, it is possible something was missed. Also, be aware that
steam generation has not yet come back on-line, so the lab may feel
unusually cold.
As you may have heard, a major power outage took out the lab (and much
of Stanford and Menlo Park) for several hours. Special thanks to the
efforts of Jose and Leonard of the FacOps crew, who got all the
facilities running in short order, and our maintenance & process crew
(Gary, Mario, Elmer, Jim, Ted, Ray, Maurice, James) who brought most of
the equipment up.
Your SNF staff
--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu
Shutdown p5000etch SNF 2008-08-18 15:27:34: Load lock pump is off
Re: Question about etching InAlAs/InGaAs - Alternative masking layers
The In material etch process on the PQ is run hot. The chuck temp is set
to around 170C with the sample running near 200C. This is too hot for a
resist mask. You to use either an oxide or a nitride mask. The selectivity
to oxide is around 10:1.
Jim
On Sun, 17 Aug 2008, Crystal Rose Kenney wrote:
> In my experiments I have an MBE stack of InAlAs and InGaAs materials. I need to etch down about 150nm and place contacts in those holes. I was initially planning on using photoresist as my mask layer, first by opening the areas to etch and then evaporating metal into the holes and doing liftoff.
>
> However, because of the high bias needed to etch InAlAs that doesn't look like a viable option. I do not wish to use two lithography steps of the same mask layer (karlsuss mask) because I am concerned about misalignment issues since I need good contact of metal on the sides of the contact holes. Are there other masking layers that could be used in this case? I need something that could stand a high bias (possibly using pquest) for etching and then use the same mask layer to evaporate metal and then have some way of removing said mask layer.
>
> I'm also open to suggestions for alternative processing steps. Thank you in advance for your help.
>
> ~Crystal Kenney
>
--
--------------------------------------------------------------
Jim McVittie, Ph.D. Senior Research Scientist
Allen Center for Integrated Systems Electrical Engineering
Stanford University jmcvittie@stanford.edu
Rm. 336, 330 Serra Mall Fax: (650) 723-4659
Stanford, CA 94305-4075 Tel: (650) 725-3640
Sunday, August 17, 2008
Question about etching InAlAs/InGaAs - Alternative masking layers
However, because of the high bias needed to etch InAlAs that doesn't look like a viable option. I do not wish to use two lithography steps of the same mask layer (karlsuss mask) because I am concerned about misalignment issues since I need good contact of metal on the sides of the contact holes. Are there other masking layers that could be used in this case? I need something that could stand a high bias (possibly using pquest) for etching and then use the same mask layer to evaporate metal and then have some way of removing said mask layer.
I'm also open to suggestions for alternative processing steps. Thank you in advance for your help.
~Crystal Kenney
Thursday, August 14, 2008
Help needed for maskmaking
Dear lab members,
My name is Jaeho Lee and I’m working for Dr. Goodson in ME department.
I need to fabricate some simple aluminum structure on silicon wafers, which would be used for temperature measurement in ME131A labs. I recently joined SNF so I’m not familiar with this type of work and I currently have no senior members from our lab to help me on maskmaking.
I have the design in my mind. A mask should be designed in a fashion that four pad measurements could be performed with a micron thick interconnect. I just don’t know where to get started such as using a software for drawing and ordering it the vendor.
I’d greatly appreciate anyone’s help or comments.
Thanks
Jaeho Lee
MS Candidate
Mechaniical Engineering
Stanford University
650) 213-6263
Wednesday, August 13, 2008
Successful BAKE SALE due to YOU
Dear Lab Members and CIS Building Dwellers,
Thank you so much for supporting our bake sale and your generosity over all - we SOLD out and made $600.00!!!! That was the easy part now, Jane Edwards is going to do the hard part and walk for 3 days!! (Thank you, Jane!)
Again thank you, for all your support and generosity.
Sincerely,
Maureen
Maureen Baran
Stanford Nanofabrication Facility
Lab Services Administrator
650-725-3664
Tuesday, August 12, 2008
Great time for Dessert with Lunch - Office 146
Please stop by office 146 and participate in our bake sale. This would be a great time to pick up something sweet for dessert or for later in the afternoon to have with your coffee.
This bake sale is a great alternative to the vending machine and as we all know, this opportunity doesn’t happen very often for the CIS dwellers.
Thank you in advance for your support for a great cause.
Maureen
Maureen
Maureen Baran
Stanford Nanofabrication Facility
Lab Services Administrator
650-725-3664
The BAKE SALE is going on right in Office 146 - next to the copy room
Good morning, the bake sale is going on right now in office 146 (Uli and Jeannie’s office), next to the copy room on the first floor. We have great treats to go with your morning coffee or afternoon break or both.
Please come by…
Maureen
Maureen Baran
Stanford Nanofabrication Facility
Lab Services Administrator
650-725-3664
Monday, August 11, 2008
CIS159(wafer saw room) water leaking
I am working on wafer saw now.
We saw water leaking in the CMP system!
I think something is wrong.
Does anyone help?
Thank you
Masaharu
REMINDER!!! CIS BUILDING BAKE SALE >>> DATE TUESDAY, AUGUST 12TH
I know what you are all thinking – just one more day until the Bake Sale.
Please make every effort to fit the bake sale into your schedule tomorrow by either:
- Buying a Bake Good
- Bringing a Bake Good
- Skipping the Bake Goods and making a Cash Donation
I’m hoping to have a very successful bake sale for our favorite “Hall Monitor” Maureen Rochford.
Thank you for any support you can lend the bake sale.
Maureen
Maureen Baran
Stanford Nanofabrication Facility
Lab Services Administrator
650-725-3664
From: Maureen Baran [mailto:mbaran@stanford.edu]
Sent: Monday, August 04, 2008 4:45 PM
To: '
Subject:
Join us for the CIS Bake Sale to benefit 2008 Breast Cancer 3 Day Walk in September in memory of Maureen Rochford.
There are 3 ways you can participate:
- Buy Bake Goods that are for sale.
- Bring a Bake Good for sale.
- Skip the Bake Goods and make a cash donation.
The event is Tuesday, August 12th, all day or until we sell out - whatever comes first.
Maureen
Maureen Baran
Stanford Nanofabrication Facility
Lab Services Administrator
650-725-3664
Friday, August 8, 2008
single undoped si wafer?
http://www.stanford.edu/group/salleo/
Ph.D. Program,
Salleo Research Group,
Electrical Engineering/ Material Science,
Stanford University
RE: etching Al2O3
alumina nicely.
Steve
-----Original Message-----
From: Baylor Triplett [mailto:baylor.triplett@gmail.com]
Sent: Friday, August 08, 2008 12:36 AM
To: shide cheng
Cc: Byungha Shin; labmembers@snf.stanford.edu
Subject: Re: etching Al2O3
All,
While I do not have experience with attempting this particular
process, it is common for Hf or BHF to penetrate photoresist and result
in lift off depending on how long the etch solution is applied, and how
concentrated the etch solution is in HF or fluoride. One first attempt
is to hard bake the resist which substantially improves the adhesion to
the substrate. Then the resist is stripped by an aggressive stripper or
plasma ashed off. Adhesion promoters also can help.
The ultimate solution can be a second layer or bilayer (sometimes
called a "hard mask" that can be etched more easily). However, I suggest
searching first for published papers in this area to see if there isn't
an easy solution.
Baylor shide cheng wrote:
> Hi, Byungha,
>
> My experience is developer will erode the Al, and Al2O3 during
> development stage. You may need anther layer to protect them during
> photo process.
>
> Shide
>
> ----------------------------------------------------------------------
> --
>
> From: shinbh93@stanford.edu
> To: labmembers@snf.stanford.edu
> Subject: etching Al2O3
> Date: Thu, 7 Aug 2008 11:40:19 -0700
>
>
> Dear Labmembers,
>
> One of my collaborators try to etch off Al2O3 at the corners of
> samples (consisting of Al2O3 / InGaAs / InP substrate) for Hall
> measurements. He found that photo-resist used to define the corners on
> Al2O3 surface was peeled off during etching by BHF. Has anyone
> sucessfully done photolithography on Al2O3? If so, what kind of
> adhesion promotor was used? Also, does anyone know the etch rate of
> Al2O3 by BHF?
>
> Thanks,
> Byungha
>
> ----------------------------------------------------------------------
> -- Get Windows Live and get whatever you need, wherever you are. Start
> here.
> <http://www.windowslive.com/default.html?ocid=TXT_TAGLM_WL_Home_082008
> >
Thursday, August 7, 2008
Re: etching Al2O3
While I do not have experience with attempting this particular
process, it is common for Hf or BHF to penetrate photoresist and result
in lift off depending on how long the etch solution is applied, and how
concentrated the etch solution is in HF or fluoride. One first attempt
is to hard bake the resist which substantially improves the adhesion to
the substrate. Then the resist is stripped by an aggressive stripper or
plasma ashed off. Adhesion promoters also can help.
The ultimate solution can be a second layer or bilayer (sometimes
called a "hard mask" that can be etched more easily). However, I suggest
searching first for published papers in this area to see if there isn't
an easy solution.
Baylor
shide cheng wrote:
> Hi, Byungha,
>
> My experience is developer will erode the Al, and Al2O3 during
> development stage. You may need anther layer to protect them during
> photo process.
>
> Shide
>
> ------------------------------------------------------------------------
>
> From: shinbh93@stanford.edu
> To: labmembers@snf.stanford.edu
> Subject: etching Al2O3
> Date: Thu, 7 Aug 2008 11:40:19 -0700
>
>
> Dear Labmembers,
>
> One of my collaborators try to etch off Al2O3 at the corners of
> samples (consisting of Al2O3 / InGaAs / InP substrate) for Hall
> measurements. He found that photo-resist used to define the corners on
> Al2O3 surface was peeled off during etching by BHF. Has anyone
> sucessfully done photolithography on Al2O3? If so, what kind of
> adhesion promotor was used? Also, does anyone know the etch rate of
> Al2O3 by BHF?
>
> Thanks,
> Byungha
>
> ------------------------------------------------------------------------
> Get Windows Live and get whatever you need, wherever you are. Start
> here.
> <http://www.windowslive.com/default.html?ocid=TXT_TAGLM_WL_Home_082008>
Postdoctoral Opening in MechE
Department of Mechanical Engineering, MIT
We are seeking a Postdoctoral Associate to assist in the development of an
integrated air-cooled pumped heat exchanger. Expertise and experience in
the following areas are highly desired:
- Design and integration of heat transfer and fluidic systems, i.e.,
heat pipes, microchannel coolers
- Micromachining and nanofabrication
- Experimental heat transfer, fluid mechanics, interfacial phenomena,
phase-change and two-phase flows
- Microfluidics and phase-change in microscale systems
The project is highly interdisciplinary and the postdoctoral associate will
join a team of faculty, and students in the Departments of Mechanical,
Electrical, and Aeronautics and Astronautics Engineering at MIT for the
project.
Please contact Evelyn Wang (enwang@mit.edu) with a detailed CV and 3-4
references.
------------------------------------------
Evelyn Wang
Esther and Harold E. Edgerton Assistant Professor
Department of Mechanical Engineering
M.I.T.
77 Massachusetts Ave. 3-461B
Cambridge, MA 02139
617-324-3311
enwang@mit.edu
http://drl.mit.edu
Labmembers' Meeting, Friday, Aug. 8, 1-2 pm, CISX Auditorium
Just a reminder that there's a Labmembers' meeting tomorrow (Friday) at
1 pm in the CISX Auditorium. Everyone in the labmember community is
welcome. We will cover: general announcements (such as the December
shutdown schedule -- start planning that holiday now!); the Quality
Circle Roundup; the Project List update (including the tylanbpsg upgrade
and EE410); and a solicitation for interested participants to revise and
update the SNF contamination policy.
Be there and be aware!
Your SNF Staff
--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu
Fwd: Aaron Gibby Orals Abstract
From: "Diane Shankle" <shankle@ee.stanford.edu>
To: <ee-students@lists.stanford.edu>
Sent: Thursday, August 07, 2008 4:20 PM
Subject: Aaron Gibby Orals Abstract
>
>
> Title: A Layered Chalcogenide Phase-Change Memory Device
>
> Name: Aaron Gibby
>
> Advisor: Prof. S. Simon Wong
>
> Time: 10:00 am, Monday, August 25th, 2008 (refreshments served at
> 9:45 am)
>
> Place: CIS-X Auditorium, 420 Via Palou
>
> ---------------------------------------------------------------------------------
>
> Non-volatile memory (NVM) is the fastest growing sector of the
> semiconductor market. With sales growing from $26 billion in 2006 to
> more than $64 billion in 2011, there is a large economic incentive to
> improve on NVM performance. This has lead to aggressive scaling of
> Flash memory, the dominant NVM technology. There are, however,
> limitations to the degree that Flash can be scaled, with failure of
> the technology predicted around the 22 nm node.
>
> As a result, research has accelerated in alternative NVM
> technologies. Among these, phase-change memory (PCM) shows
> particular promise given its small cell size, non-destructive read,
> direct overwrite ability, large sensing margin, and fast speed.
> Despite these advantages, the requirement for a large (mA - range)
> programming current remains the major obstacle to mainstream
> implementation for PCM.
>
> To address this issue, we propose a novel layered structure where the
> phase-change material (Ge2Sb2Te5, or GST) is sandwiched between two
> other layers (called GST-x layers). With the correct choice of
> material, the GST-x layers improve the thermal isolation of the GST,
> while reducing the volume of material programmed. This, in turn,
> lowers the energy and current required to operate the device.
>
> After a thorough analysis of GST-x candidates using X-ray
> Diffraction, X-ray Photoemission Spectroscopy, Thermal Reflectance
> Thermometry, and electrical measurements, GeTe (GT) was chosen to
> function as the GST-x film. Single layer GST and multi-layer
> GT/GST/GT devices were then fabricated and compared. Analysis was
> conducted using a combination of electrical measurements,
> transmission electron microscopy and scanning Auger spectroscopy.
>
> As a result of this analysis, GT/GST/GT devices showed a modest (~2x)
> improvement in programming current on the first cycle and a
> significant (~40x) improvement on subsequent cycling. Reasons for
> this and reliability concerns are discussed.
>
> --
> EE students mailing list
> ee-students@lists.stanford.edu
> https://mailman.stanford.edu/mailman/listinfo/ee-students
>
Re: Problem p5000etch SNF 2008-08-07 01:24:43: wafer is stuck.
RE: etching Al2O3
My experience is developer will erode the Al, and Al2O3 during development stage. You may need anther layer to protect them during photo process.
Shide
From: shinbh93@stanford.edu
To: labmembers@snf.stanford.edu
Subject: etching Al2O3
Date: Thu, 7 Aug 2008 11:40:19 -0700
Get Windows Live and get whatever you need, wherever you are. Start here.
etching Al2O3
warning from p5000etch-pcs@snf.stanford.edu
p5000etch-pcs@snf.stanford.edu mailing list.
I'm working for my owner, who can be reached
at p5000etch-pcs-owner@snf.stanford.edu.
Messages to you from the p5000etch-pcs mailing list seem to
have been bouncing. I've attached a copy of the first bounce
message I received.
If this message bounces too, I will send you a probe. If the probe bounces,
I will remove your address from the p5000etch-pcs mailing list,
without further notice.
I've kept a list of which messages from the p5000etch-pcs mailing list have
bounced from your address.
Copies of these messages may be in the archive.
To retrieve a set of messages 123-145 (a maximum of 100 per request),
send an empty message to:
<p5000etch-pcs-get.123_145@snf.stanford.edu>
To receive a subject and author list for the last 100 or so messages,
send an empty message to:
<p5000etch-pcs-index@snf.stanford.edu>
Here are the message numbers:
2168
2173
2180
2181
2182
--- Enclosed is a copy of the bounce message I received.
Return-Path: <>
Received: (qmail 28268 invoked from network); 26 Jul 2008 06:56:32 -0000
Received: from smtp1.stanford.edu (171.67.22.28)
by snf.stanford.edu with SMTP; 26 Jul 2008 06:56:32 -0000
Received: by smtp1.stanford.edu (Postfix)
id 831402D6A32; Fri, 25 Jul 2008 23:56:32 -0700 (PDT)
Date: Fri, 25 Jul 2008 23:56:32 -0700 (PDT)
From: MAILER-DAEMON@stanford.edu (Mail Delivery System)
Subject: Undelivered Mail Returned to Sender
To: p5000etch-pcs-return-2168-snfblog.P5000=blogger.com@snf.stanford.edu
Auto-Submitted: auto-replied
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Problem p5000etch SNF 2008-08-07 01:24:43: wafer is stuck.
Yoonjin
Wednesday, August 6, 2008
Reminder: Wei Wang Ph.D Oral Defense 08/07/2008 (Tomorrow)
--
EE students mailing list
ee-students@lists.stanford.edu
https://mailman.stanford.edu/mailman/listinfo/ee-students
Watch was found outside the CIS Building
Dear Labmembers and CIS Dwellers,
A watch was found outside the CIS building today. If you have misplaced your watch and you think it is yours, please come by my cubicle and be prepared to describe it.
Thank you,
Maureen
Maureen Baran
Stanford Nanofabrication Facility
Lab Services Administrator
650-725-3664
Tuesday, August 5, 2008
New Manual Resist Handling Procedures
Please be aware of the new handling procedures for manual dispensing of
standard resists. Small, easy-to-handle bottles of standard resists are
provided for your convenience in the small flammables cabinet next to
the wbmiscres/headway2 station (special thanks to Mario, Jim, and
Mahnaz!) Please use these bottles for manual dispensing at the headway2
and laurell stations only. Bottles may be hand-carried and used ONLY AT
HEADWAY OR LAURELL STATIONS. They must be returned to the cabinet when
finished.
The standard resists stocked are: SPR 3612, SPR 3617M, SPR 220-7, SPR
220-3, and LOL 2000. Do not place other resists in this cabinet. (Any
non-standard resist bottles found here will be removed and discarded.)
Be courteous to the next user -- make sure to use care to avoid drips --
and carefully wipe away any that might occur.
We trust that these smaller bottles are safer than handling the large
one-gallon jugs -- and may save people a trip to the back with the
solvent cart.
Your Litho Staff
--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu
spray coater
Does anyone know any commercial spray coating services for silicon wafers in California? I have some TMAH etched V-groves about 300um deep that I would like to coat them with Shipley 3612 resist.
Thank you for your help.
Mike
Monday, August 4, 2008
Venture Clinic, Thur. Aug. 14, 2 pm, CIS 101
Shahin Farshchi, an Associate from Lux Capital, will be moderating a Venture Clinic, which aims to provide an informal forum for researchers interested in brainstorming with a venture capitalist on avenues for commercializing technology, what to expect when starting a new venture.
Technical discussions should be limited to what has been already disclosed or published.
This will take place on Thursday, August 14, at 2 pm in CIS 101.
For more information, contact:
Shahin Farshchi, Ph.D.
Phone: 925.323.2784
Email: shahin.farshchi@luxcapital.com
--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu
Chandra Mohan Jha Thesis Defense - 8:08 am Friday, 08/08/08
"Design of Thermally and Mechanically Isolated Ovenized Microresonators"
Advisor: Prof. Thomas W. Kenny
Date: Friday, Aug 8th
Time: 8:08 am (Refreshments beforehand)
Venue: CISX-101 (Auditorium)
http://campus-map.stanford.edu/index.cfm?ID=04-055
Abstract:
Micromechanical resonators are becoming an interesting and viable technology
as a replacement for quartz crystals for timing and frequency reference
applications. For high precision applications in industry and military, oven
controlled resonators are used to compensate for the temperature dependence
of resonator frequency. An oven controlled resonator requires a good
temperature sensor and an efficient heater (oven). However, an external
temperature sensor leads to thermal lag and the ovenization leads to power
consumption.
This work presents a microresonator based digital temperature sensing
technique as well as an efficient local-thermal-isolation method. The
microresonator based thermometry results into a lag-free temperature sensor
for self temperature compensation suitable for high precision oven control
of the resonator. The thermal isolation technique includes the design of an
integrated heater with the microresonator such that the mechanical
suspension, electrical heating and thermal isolation are provided in a
single compact structure. This results in reducing the power consumption by
more than 20x and the thermal time constant by more than 50x. Further
reduction in power consumption requires analysis of the resonator structure
to maintain its mechanical integrity. An improved thermally isolated design
using topology optimization will be described. The final design provides
both the thermal isolation as well as the mechanical isolation with the
overall reduction in power consumption of 40x. Furthermore, these methods
are simple enough to implement it into any existing MEMS fabrication
process.
Saturday, August 2, 2008
etching oxide
Dear Lab members,
Does anyone have any experience in using amtetcher to pattern substrate with 200um- 300um micron holes? 1) Using the amtetcher, would the plasma go into the holes and then etch the oxide inside the holes (laterally)? My oxide thickness is about 600nm which takes about 15minutes to etch. The holes that I have are 300um deep with 30um and 100um diameters. I am trying to create a tapered surface with several high aspect ratio (1:30) holes.
2) Does anyone have any wet-etch simulation software that I can try out for free?
Thank you very much for your consideration.
Sincerely,
Mike Tan
Friday, August 1, 2008
Re: FW: Die saw at Stanford or elsewhere
While I cannot be certain without trying it, my understanding is
the wafer saw that CIS has should be able to cut such materials.
Certainly, my colleagues (years ago) used an almost identical wafer saw
to cut GGG (or Gadolium Gallium Garnet which is quite hard...probably
comparable to titania. Only thing is you should use high blade speed,
special blade that works best, and probably shallow multiple cuts to
reduce the troublesome blade heating. Kulicke and Sofa could probably
give you advice...and you may/may not need a special blade to minimize
heating....more likely needed if you have a gummy material on top of the
titania such as polyimide or polymerized organics. Do not try to cut all
the way through...you want to cut 60% to maybe 80% through and then
cleave the remainder. And these numbers are only guesses.
The important thing is the cutting is more a function of
parameters and blade selection than saw. Of course, allbets are off if
CIS won't let you use it for contamination reasons. Talk to Mary Tang.
Regards, Baylor Triplett
Consulting Professor
Jason Fu wrote:
> Hi, everyone,
>
> Is there a die saw in the lab or such service elsewhere in the area
> that could be used to cut hard glasses and oxides such as zirconia
> and titania?
>
> Thanks,
>
> Jason
>
Learn to save someone's life: Take a CPR/AED class!
On Thursday, August 21, we've arranged for a First Aid/CPR/AED class to be offered here.
This 8-hour course will cover basic first aid and emergency procedures
that you could use to save someone's life. This course will also cover Cardio-Pulmonary
Resuscitation (CPR) and use of the Automated External Defibrillator
(AED) – which are awfully handy skills to know, when someone's heart stops.
If you had First Aid a long time ago, it's well worth doing again because the recommended
practices have changed a LOT. Also, we are fortunate to have TWO AED systems in CIS/CISX,
so it's handy to know how to use them. One statistic is that use of CPR alone results in
a survival rate of a few percent. Using an AED within 3 minutes of heart failure has a
survival rate of 75% or greater.
The class will be held on August 21, from 8 am - 4 pm. Completion of this course gives
you a certification that is valid for two years. The class is open to building occupants
and active labmembers.
If you are interested in registering, please get in touch with me.
Thanks for your attention!
Mary
--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu
A few general announcements...
Greetings labmembers --
Just a few general announcements --
- Those interested should check out the new job postings on the SNF website -- http://snf.stanford.edu/Affiliates/Jobs.html
- Facilities will be working on Transfer Fan #4 Monday morning (8/4). There will be no laminar flow over the following equipment: alphastep/ellipsometer/p2, wbgaas/wbgen2/fga2/tylans1-4, epi2/AG4100/AG4108.
- Reminder that the Labmembers' meeting has been postponed to Friday, Aug. 8, at 1 pm in the CISX Auditorium.
Your SNF Staff
-- Mary X. Tang, Ph.D. Stanford Nanofabrication Facility CIS Room 136, Mail Code 4070 Stanford, CA 94305 (650)723-9980 mtang@stanford.edu http://snf.stanford.edu
Ni Electroplating vendor
I am looking for a vendor (preferably local) that can plate ~5um of Ni (composition is flexible). Does anyone have such a source?
Thanks in advance
-Tariq