Has anyone tried masking the back (unpolished side) of a Si wafer with
PECVD oxide or nitride during a Si wet etch in TMAH?
I tried this once and did not get very good results with PECVD oxide.
My guess at that time was that the roughness on the back of the wafer
caused the SiO2 mask to come off. I switched to using double polished
wafers then but I still have some samples with an unpolished back
surface that I need to mask and pattern for the Si etch. The pieces
already have metal on them so I cannot grow thermal oxide. Can anybody
suggest a way to mask the unpolished back surface?
Thanks a lot,
Arunanshu
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