Tuesday, November 30, 2010

Annual Lab Cleanup: TWO WEEK NOTICE!

Dear Labmembers -- a reminder that:

The Lab will shutdown 7 am, Thursday, Dec. 16 and will reopen 7 am, Tuesday, Jan. 4, 2011.

All personal items in the cleanroom that are NOT stored inside assigned lab bins or roll-around carts will be subject to removal starting on
Tuesday, Dec. 14. (Items like wafer boxes, tweezer boxes, notebooks, tool boxes will be removed.)

All personal storage containers in the CAD room (151) must be labeled with date and login. Only plastic containers: no cardboard boxes.
Outdated items are subject to removal starting Dec. 14.


Please make sure your personal items are properly labeled and stored in coming weeks.

Thanks for your attention --

Your lab staff

--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu

Nanosociety Meeting Friday @ 12:00 pm, McCullough 115: Pore Filling & Light Trapping in Solid State Dye-sensitized Solar Cells

Friday at 12 pm, I-Kang Ding, a member of the McGehee group, will be presenting research on solid state dye-sensitized solar cells in McCullough 115.

As always, the meeting will be in McCullough 115, and FREE PIZZA will be served at 11:55 am.

Want to learn more about the nanosociety? Join the mailing list: https://mailman.stanford.edu/mailman/listinfo/nanosociety

Pore Filling & Light Trapping in Solid State Dye-sensitized Solar Cells

I-Kang Ding

Department of Materials Science and Engineering
McGehee Group

Dye-sensitized solar cells (DSCs) are among the promising PV technologies that could potentially replace the expensive silicon. Liquid electrolyte-based DSCs have the highest efficiency but they suffer from potential stability and encapsulation problems. People are actively pursuing the solid state dye-sensitized solar cells (ss-DSCs), which uses a solid-state hole-transport material to replace the liquid electrolyte. SS-DSCs can potentially achieve higher power conversion efficiencies than the liquid-electrolyte because the open-circuit voltage can be adjusted by the choice of different hole-transport materials. However, current ss-DSCs are limited by both pore filling and electron-hole recombination such that the optimal thickness is around 2 micron, far thinner than the thickness needed to achieve good optical absorption.


Here we describe two approaches to improve the efficiency of the solar cell. The first one is to increase pore filling of hole transport material. Pore filling has important consequences in the efficiency of the device because increasing pore filling could lower the recombination loss by allowing holes to stay away from the electrons in TiO2, which in turn may increase the optimum thickness of the device. The second approach is to increase the absorption of the device through the use of plasmonic back reflectors, which consist of two-dimensional (2D) array of silver nanodomes. They are incorporated into the ss-DSCs by nanoimprint lithography, and they enhance absorption through excitation of plasmonic modes and increased light scattering.

Monday, November 29, 2010

Found Sunglasses Outside the Clean room

Dear Labmembers,

 

A concerned lab member found some nice sunglasses outside the Clean room.  If you have just recently misplaced your sunglasses please come by my cubicle # 41 and be prepared to describe them.  NOTE:  You need to go beyond the obvious characteristics such as the lenses are dark and they have to arm pieces ;>).

 

Thank you,

 

Maureen

 

Maureen Baran

Stanford Nanofabrication Facility

Lab Services Administrator

mbaran@stanford.edu

650-725-3664

 

Saturday, November 27, 2010

Asking dry/wet recipes

Hello,

This is Seongjae Cho at Prof. Harris Group.
I'm writing an e-mail to ask you some process recipes regarding etches.

I have GeSn (Sn composition of 3.5%) on GaAs substrate.
I'm on the point of dry-etching the GeSn layer with Cr hard mask
but I have no preceding process results on this, so
I need advice on the allowed equipment (maybe pquest or drytek4) and
etchant gas (gas ratios) for GeSn etch.

After getting a micro-wide pillar of GeSn, I need to wet-etch the GaAs sub
to get undercut beneath: tentatively, 1 um between the GeSn and the
sustaining GaAs pillar perimeters. The appropriate solution ratios seem
to be required for this quite large dimension etch out.

Since it is only few days since stepped in the SNF, your pieces of advice
will be of great help until I get significantly accumulated knowledge.
Especially I have only two samples for test runs,
I have to steel it very effectively.
I welcome any information or suggestions.
Thank you. Have a good weekend.

- Sincerely, Seongjae.

Wednesday, November 24, 2010

Shutdown p5000etch SNF 2010-11-24 09:33:15: Loadlock pressure gauge problem

LL pressure gauge is not reacting to the change in pressure

Tuesday, November 23, 2010

Special Seminar - Dr. Seung Rim (SunPower Corp.), Thursday Dec. 2, 4:15 PM, Nano 232

Special Seminar Presented by the Stanford Optical Society

Progress in back contact crystalline silicon solar cell

Dr. Seung Rim

R&D Staff Engineer at SunPower Corporation

Thursday, December 2, 4:15 PM, Nano Center 232

Refreshments at 4PM

 

SunPower Corporation designs, manufactures and delivers high-performance solar electric systems worldwide for residential, commercial and utility-scale power plant customers. SunPower high-efficiency solar cells and solar panels generate up to 50 percent more power than conventional solar technologies and have a uniquely attractive, all-black appearance. I'll briefly introduce SunPower's high efficiency products and market today. The advantages of SunPower's back contact solar panels will be discussed including high performance ratio (kWh/kWp) and reliability. In the second part of this talk, I'll present efficiency improvement of SunPower solar cells. The Generation 1 showed efficiency 20.5% and Generation 2 did higher than 22%. The Generation 3 product has been designed to deliver both increased performance and lower manufacturing cost. The champion cell achieved 24.2% of conversion efficiency by optimizing of the diffusion recombination on production equipment using a production wafer, 155.1cm2 n-type CZ.

About the speaker

Seung Rim is a R&D staff engineer at SunPower Corporation. Prior to joining SunPower, he earned his B.S. in Electrical Engineering in Seoul National University in Republic of Korea and his Ph.D. in Electrical Engineering with Prof. Peter Peumans at Stanford University. His work currently focuses on high efficiency low cost back contact solar cell development.

Fwd: EE PhD Oral Examination - Kosar B. Parizi, Tuesday, November 23, 2010;4:15pm

----- Forwarded Message -----
From: "Natasha Newson" <nnewson@stanford.edu>
To: ee-students@mailman.stanford.edu
Sent: Friday, November 19, 2010 2:58:59 PM
Subject: EE PhD Oral Examination - Kosar B. Parizi, Tuesday, November 23, 2010; 4:15pm

Stanford University Oral Defense - Department of Electrical Engineering


Nano-bridge Array Biosensors for Low Concentration Detection of DNA Hybridization

Kosar B. Parizi ( kosarb@stanford.edu )

Advisor: Professor Yoshio Nishi

Nov. 23 rd 2010 @ 4:15 pm

(refreshments at 4:00 pm)

P. Allen Building, CISX 101

Abstract

Electrical biosensors provide real time and label free detection. Conductance biosensors are a class of electrical biosensors that show promise for point-of-care and disease discovery due to real time, low cost, ease of miniaturization and label-free operation. However, it is critically important for electrical biosensors to have enough high sensitivity for low-concentration detection of bio-species, which is still missing today. We have introduced Nano-bridge biosensor as an improved structure with leads to higher Signal to Noise Ratio. In compare with other planar electrical biosensors, such as Semiconductor Nanowire Biosensors, the nano-bridge array biosensor has significant improvement in signal to noise ratio, active exposed surface, and lower target bio-species detection. The devices have been fabricated and tested for detection of DNA hybridization different conference.

--
EE students mailing list
ee-students@lists.stanford.edu
https://mailman.stanford.edu/mailman/listinfo/ee-students

Fwd: EE PhD Oral Examination - Kosar B. Parizi, Tuesday, November 23, 2010;4:15pm

----- Forwarded Message -----
From: "Natasha Newson" <nnewson@stanford.edu>
To: ee-students@mailman.stanford.edu
Sent: Friday, November 19, 2010 2:58:59 PM
Subject: EE PhD Oral Examination - Kosar B. Parizi, Tuesday, November 23, 2010; 4:15pm

Stanford University Oral Defense - Department of Electrical Engineering


Nano-bridge Array Biosensors for Low Concentration Detection of DNA Hybridization

Kosar B. Parizi ( kosarb@stanford.edu )

Advisor: Professor Yoshio Nishi

Nov. 23 rd 2010 @ 4:15 pm

(refreshments at 4:00 pm)

P. Allen Building, CISX 101

Abstract

Electrical biosensors provide real time and label free detection. Conductance biosensors are a class of electrical biosensors that show promise for point-of-care and disease discovery due to real time, low cost, ease of miniaturization and label-free operation. However, it is critically important for electrical biosensors to have enough high sensitivity for low-concentration detection of bio-species, which is still missing today. We have introduced Nano-bridge biosensor as an improved structure with leads to higher Signal to Noise Ratio. In compare with other planar electrical biosensors, such as Semiconductor Nanowire Biosensors, the nano-bridge array biosensor has significant improvement in signal to noise ratio, active exposed surface, and lower target bio-species detection. The devices have been fabricated and tested for detection of DNA hybridization different conference.

--
EE students mailing list
ee-students@lists.stanford.edu
https://mailman.stanford.edu/mailman/listinfo/ee-students

Monday, November 22, 2010

Problem p5000etch SNF 2010-11-22 22:34:57: Disk is full, unable to access recipe file

It says root directory is full and cannot access recipe file. Unable to process.

Comment p5000etch SNF 2010-11-22 18:22:51: Filesystem error

Can still etch, but there's a red bar on top that says "Error in access to recipe file - location 11012 error num 73." When I click on "more," it says, "Root directory is full on disk."

Thursday, November 18, 2010

Annual Lab Cleanup - 4 Week Notice!

Dear Labmembers -- a reminder that:

The Lab will shutdown 7 am, Thursday, Dec. 16 and will reopen 7 am, Tuesday, Jan. 4, 2011.

All personal items in the cleanroom that are NOT stored inside assigned lab bins or roll-around carts will be removed from the lab starting on Tuesday, Dec. 14.

All personal storage containers in the CAD room (151) must be labeled with date and login.  Only plastic containers:  no cardboard boxes.  Outdated items may be removed starting Dec. 14.


Please make sure your personal items are properly labeled and stored in coming weeks.

Thanks for your attention --

Your lab staff 

 

--  Mary X. Tang, Ph.D. Stanford Nanofabrication Facility Allen Room 136, Mail Code 4070 Stanford, CA  94305 (650)723-9980 mtang@stanford.edu http://snf.stanford.edu 

Wednesday, November 17, 2010

SiC wafers.

Dear all.

I would appreciate if you can point me to SiC wafers vendor.

Thanks
-Gaurav

missing wafer box and mask

Labmembers,

 

I am writing to ask if anyone last week may have seen or accidentally picked up a mylar mask and carrier with 5 of Si coated glass wafers. The mask and etch pattern on the surface is similar to that shown in the attached pdf. (It looks like a Nazca geoglyph) We searched the lost and found, the CAD room and the fab area at large without luck.  The user name would be  H.Nuhn or M.Kerby written on a silver foil bag and PP wafer carrier.

 

Thank you for your assistance,

Matt

 

Matthew B. Kerby Ph.D., P.E.

Post Doctoral Scholar, Barron Group

Stanford University Bioengineering

318 Campus Drive West

Clark Center, Room W156
Stanford, CA 94305-5437

 

O 650-721-5647

C 650-315-4005

F 650-724-5791

 

RE: wafer laser cutting

All - Remy from APD gave me his contact info to forward on - contacting him directly for cutting services would be the most efficient.
Jim

Remy Daniels
Business Development
American Precision Dicing, Inc.

642 Giguere Ct
San Jose, Ca 95133

Work: 408-254-1600
Cell: 925-272-8009
Text: 408-206-4442
Fax: 408-254-0999

Standard Dicing : www.wafer-dicing.com
Laser Dicing : www.silicon-chips.com & www.wafer-coring-resizing.com
________________________________________
From: Sebastian J. Osterfeld [sjo@stanford.edu]
Sent: Wednesday, November 17, 2010 8:25 AM
To: labmembers@snf.stanford.edu
Subject: Re: wafer laser cutting

I've used American Precision Dicing in San Jose for this before. They
have a special laser inside a water jet, which means the cutting zone
won't melt. This way you don't introduce heat damage and more
importantly, the process won't form a melted edge bead, meaning your
cutout will still be perfectly flat. This is important if you want to
use contact masks. The cutting edge will be slightly serrated, though,
as if someone had drilled thousands of 0.2mm dia. holes to form the cut.

Sebastian


On 11/16/2010 6:00 PM, Angie Lin wrote:
> Hi all,
>
> Does anyone know of any good wafer laser cutting services in the
> area? I'd like to cut a 2-inch round out of a Si wafer.
>
> Thanks for your help,
> Angie


--
Sebastian J. Osterfeld, Ph.D.
Shan X. Wang Group
Dept. of Materials Science& Engineering
Stanford University

McCullough Building, Room 208A
476 Lomita Mall
Stanford, CA 94305-4045

Phone: (650) 906-1946
Fax: (650) 736-1984
Email: sjo@stanford.edu
Office: http://maps.google.com/maps?f=q&hl=en&q=w122.1732+n37.4275&ll=37.427502,-122.173204&spn=0.006296,0.013561&t=h

Re: wafer laser cutting

I've used American Precision Dicing in San Jose for this before. They
have a special laser inside a water jet, which means the cutting zone
won't melt. This way you don't introduce heat damage and more
importantly, the process won't form a melted edge bead, meaning your
cutout will still be perfectly flat. This is important if you want to
use contact masks. The cutting edge will be slightly serrated, though,
as if someone had drilled thousands of 0.2mm dia. holes to form the cut.

Sebastian


On 11/16/2010 6:00 PM, Angie Lin wrote:
> Hi all,
>
> Does anyone know of any good wafer laser cutting services in the
> area? I'd like to cut a 2-inch round out of a Si wafer.
>
> Thanks for your help,
> Angie


--
Sebastian J. Osterfeld, Ph.D.
Shan X. Wang Group
Dept. of Materials Science& Engineering
Stanford University

McCullough Building, Room 208A
476 Lomita Mall
Stanford, CA 94305-4045

Phone: (650) 906-1946
Fax: (650) 736-1984
Email: sjo@stanford.edu
Office: http://maps.google.com/maps?f=q&hl=en&q=w122.1732+n37.4275&ll=37.427502,-122.173204&spn=0.006296,0.013561&t=h

RE: wafer laser cutting

Angie - we've recently demo'd with American Precision Dicing and their water cooled laser does a good job.
Jim
http://www.wafer-dicing.com/

________________________________________
From: Angie Lin [angiel@stanford.edu]
Sent: Tuesday, November 16, 2010 6:00 PM
To: labmembers
Subject: wafer laser cutting

Hi all,

Does anyone know of any good wafer laser cutting services in the
area? I'd like to cut a 2-inch round out of a Si wafer.

Thanks for your help,
Angie

Tuesday, November 16, 2010

wafer laser cutting

Hi all,

Does anyone know of any good wafer laser cutting services in the
area? I'd like to cut a 2-inch round out of a Si wafer.

Thanks for your help,
Angie

Monday, November 15, 2010

Process Clinic, Today, 2-3 pm

Dear Labmembers,

There will be a Process Clinic today, Monday, November 15, from 2-3 pm in the
cubicle area outside Maureen's office, cube #41. Bring device sketches, process
questions/runsheets, and mask layouts and questions.

Your SNF Staff

--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu

Re: Problem p5000etch SNF 2010-11-11 17:53:52: Wafer handler problems

Created wafer to all three chamber, unload each one at the
time and no problem with extension or rotation robot.

Friday, November 12, 2010

Anyone have an analog ohmmeter I can use?

Hi labmembers,

I need to use an analog ohmmeter for about 30 min this afternoon. Does anyone have one I can borrow temporarily? Our lab only has digital ones. Thanks in advance.

--
Mihir Tendulkar
Applied Physics PhD Candidate
Nishi Group, Stanford University

Comment p5000etch SNF 2010-11-12 11:46:56: Wafer handler

I used Chamber C today, and the wafer handler problem seems to be solved. It is working well now.

Special Seminar - Prof. Andrew Weiner (Purdue), Tuesday Nov. 16, 3:30 PM, Phys/Astro 102

Special Seminar Presented by the Stanford Optical Society

Ultrabroadband Radio-Frequency Photonics

Andrew M. Weiner

Scifres Distinguished Professor of Electrical and Computer Engineering, Purdue University

Tuesday, November 16, 3:30 PM, Physics and Astrophysics 102

Refreshments at 3:15 PM

 

Radio-frequency (RF) technology is ubiquitous in systems ranging from wireless communications to radar and electronic warfare.  Conventional RF systems are usually designed to operate at low instantaneous bandwidth with signals possessing a well defined center frequency (that may be tuned slowly over a large range).  Furthermore, although such systems generally employ coherent, phase-based signaling schemes within their narrow instantaneous frequency band, control of phase across large frequency bands is usually not considered.   On the other hand, optical systems can be extremely broadband, generating pulses with durations down to femtoseconds and with terahertz instantaneous bandwidths.  Such ultrashort pulse optical systems are fundamentally time-domain in nature, and control of phase over the full bandwidth is crucial. 

In this talk I discuss research in which sophisticated systems for manipulating time-domain ultrashort pulse photonic signals via coherent parallel processing in the optical frequency domain are adapted for generation, processing, and application of ultrabroadband RF electrical signals.  Examples include: photonic approaches for generating complex short pulse RF waveforms with instantaneous bandwidths up to tens of GHz, well beyond what is available via existing electronics solutions; novel photonic methods for implementing programmable matched filters for compression of burst RF signals with instantaneous bandwidths up to ~15 GHz; and experiments demonstrating the compensation of strong dispersive effects observed upon impulse excitation of broadband antenna pairs. 

About the Speaker:

Andrew M. Weiner graduated from M.I.T. in 1984 with an Sc.D. in electrical engineering.  Upon graduation he joined Bellcore, first as Member of Technical Staff and later as Manager of Ultrafast Optics and Optical Signal Processing Research.  Prof. Weiner moved to Purdue University in 1992 and is currently the Scifres Distinguished Professor of Electrical and Computer Engineering. His research focuses on ultrafast optics signal processing and applications to high-speed optical communications and ultrawideband wireless.  Prof. Weiner is author of a textbook entitled Ultrafast Optics (Wiley, 2009) and has published seven book chapters and approximately 235 journal articles.  He is author or coauthor of over 400 conference talks and has 12 U.S. patents.  Prof. Weiner is a Fellow both of the Optical Society of America and of the Institute of Electrical and Electronics Engineers (IEEE) and is a member of the U.S. National Academy of Engineering. He has won numerous awards for his research, including the Hertz Foundation Doctoral Thesis Prize (1984), the Adolph Lomb Medal of the Optical Society of America (1990), the Curtis McGraw Research Award of the American Society of Engineering Education (1997), the International Commission on Optics Prize (1997), and the Alexander von Humboldt Foundation Research Award for Senior U.S. Scientists (2000).  He is joint recipient, with J.P. Heritage, of the IEEE LEOS William Streifer Scientific Achievement Award (1999) and the OSA R.W. Wood Prize (2008) and has been recognized by Purdue University with the inaugural Research Excellence Award from the Schools of Engineering (2003) and with the Provost's Outstanding Graduate Student Mentor Award (2008).  In 2009 Prof. Weiner was named a U.S. Dept. of Defense National Security Science and Engineering Faculty Fellow.  Prof. Weiner has served as Co-Chair of the Conference on Lasers and Electro-optics and the International Conference on Ultrafast Phenomena, as Secretary/Treasurer of the IEEE Lasers and Electro-optics Society (LEOS), and as a Vice-President of the International Commission on Optics (ICO).  He is currently serving as Chair of the National Academy of Engineering's U.S. Frontiers of Engineering Meeting.

Thursday, November 11, 2010

Problem p5000etch SNF 2010-11-11 17:53:52: Wafer handler problems

Encountered ROBOT EXTENSION UNKNOWN POSITION error. Was able to use manual commands to retrieve wafer, but etch chamber still thinks there's a wafer inside (when there isn't). I decided not to retry the etch; next user should use caution.

Special Seminar - Raj Chhibber, CEO BrighTex Bio-Photonics, Thursday Nov. 18, 4:15PM, Hewlett 102

Special guest lecture presented by the Stanford Optical Society

Skin Metrology

Raj Chhibber

CEO BrighTex Bio-Photonics LLC, USA

 

Thursday, November 18, 2010, 4:15 PM, Hewlett 102 (Refreshments at 4 PM)

 

Skin metrology for clinical research with optics and image processing is a new and emerging field for diagnostic studies of a patient's skin health. The quantification of skin analysis is important for accurately measuring skin conditions such as UV damage for early cancer detection, skin topology for aging, and sebum distribution for acne. We have built an instrument which can give a patient a customized report of his skin health based on a few quick pictures of the face. Analysis of the data can very readily provide information about a person's susceptibility to sun damage or melanoma scoring among other things and return instant feedback to help patients take preventative measures. The cosmetic industry is a $10 billion a year industry in America alone. Carrying out product studies for efficacy and safety by independent research laboratories with our technology can help verify treatment options and formulate customized cosmetics for skin health.

 

About the speaker:

 

Raj Chhibber, CEO, BrighTex Bio-Photonics LLC, San Jose, California, US has 25 years of experience working in the Silicon Valley area developing metrology equipment for the semiconductor industry. He has held senior management positions including engineering, research, and development at Nanometrics, Phase-Metrics, Therma-Wave, Micro Lithography, Eastman Kodak. He is the founder of many start-up companies in the semiconductor metrology technology sector In 2002, he founded RCA Metrology, where he served as CEO until 2003. Soon afterward, he became the CTO of TwinStar Sys. Inc. And in 2004, he founded BrighTex Bio-Photonics (BTBP) and is currently serving as its CEO. BTBP is the leader in skin diagnostics for the cosmetic industry, providing metrology for early cancer detection and skin aging conditions. Raj earned a BSc and MS in Applied Physics from University of Essex, UK. He also received a Diploma in applied Physics from the Institute of Physics, UK.



--
************************************
Gary Shambat
Stanford University Electrical Engineering
gshambat@gmail.com
http://www.stanford.edu/~gshambat/
(703) 926-5655

Ph. D. Oral Defense: Yiyang Gong, Tuesday 11/16, 10:30am Nanoscience 232

Silicon-based nanobeam photonic crystal light emitting devices
Tuesday, November 16th, 2010 10:30 am (refreshments 10:15 am)

Ph. D. Candidate: Yiyang Gong

Research Advisor: Jelena Vuckovic

Committee: Mark Brongersma, Shanhui Fan, David Miller


Location: Center for Nanoscience 232

Silicon compatible light emitting materials can enable a new class of cost-efficient opto-electronic devices, as optical devices and electronic devices can be integrated on the same platform. However, the low emission efficiency of such materials has hampered the development of silicon light emitting devices. We explore the use of photonic cavities to enhance the emission properties of silicon nano-crystals (Si-NCs) in oxide and Er-doped silicon nitride, as high Q, low mode volume cavities enhance the light-matter interaction.

Two dimensional photonic crystal (2D- PC) cavities have been developed for the enhancement of emission for various materials, and cavities with quality (Q-) factors greater than 105 have been experimentally demonstrated in materials with index of refraction n = 3.5. However, materials such as Si-NC doped oxide and nitride have low index of refraction (n 2.0), and 2D PC cavities have been experimentally demonstrated with Q-factors up to only 3,400 in such low index systems. We investigate one dimensional nanobeam PC cavities, which are versatile and enable high Q cavities for various indices of refraction. We describe the design and fabrication of nanobeam cavities in silicon dioxide (n = 1.5), with experimental Qs over 5,000 in the visible wavelengths. We also study nano-optomechanical effects in passive Si-based nanocavities. We then fabricate nanobeam cavities in silicon oxide with embedded Si-NCs and Er-doped amorphous silicon nitride. We demonstrate Q > 9,000 for the Si-NC material, and analyze the signature of free carrier absorption for this type of material. In addition, we demonstrate nanobeam cavities in the Er-doped nitride material with Q > 15,000. We observe linewidth narrowing in the Er material with increasing pump power, which is a signature of absorption saturation and differential gain, at both room temperature and cryogenic temperatures. Compared to previous designs using high index Si as part of the cavity, we observe a reduction of absorption losses arising from the material, and correspondingly larger decreases in linewidth. By using time resolved measurements, we calculate that optical transparency of the material is reached at high pump powers.


hydrophobic coating for silicon wafer

Hallo,

does anybody know or has some experience in changing the surface wettability towards a hydrophobic characteristics for silicon wafers?

Thanks for your help

--
Markus Buchgraber
Ph.D Candidate
Department of Energy Resources Engineering
367 Panama, Rm 065
Stanford University
Stanford, CA 94305-2220

(650) 644-6762 (mobile)
Office - Green Earth Sciences Rm. 159
e-mail: markus.buchgraber@stanford.edu

Nanosociety Meeting TOMORROW Friday @ 12:00 pm, McCullough 115: Trying To Make Solar Cells Better Using Nanotechnology: A Graduate Student's Journey to Figure Out Something New In A Crowded Field

Tomorrow at 12 pm, the nanosociety will be hosting a special talk by our co-founder and former president, Brian Hardin. In this unique lecture, Brian will talk about the process he went through in graduate school to create the highly successful research projects that became his thesis work. Undergraduates and young graduate students are especially encouraged to attend.

As always, the meeting will be in McCullough 115, and FREE PIZZA will be served at 11:55 am.

Want to learn more about the nanosociety? Join the mailing list: https://mailman.stanford.edu/mailman/listinfo/nanosociety

Trying To Make Solar Cells Better Using Nanotechnology:
A Graduate Student's Journey to Figure Out Something New In A Crowded Field


Brian Hardin

Department of Materials Science and Engineering
Graduate of the McGehee Group

Public interest and research dollars in the field of solar power has increased exponentially in the last decade creating an influx of hungry graduate students looking to make improvements in well studied systems in a variety of weird, often times fundamentally flawed ways. Creating research projects that are both novel and potentially useful is a very long and daunting process. I will begin by discussing how I developed my research projects involving dye-sensitized solar cells, which eventually became my thesis, and then describe our current research efforts in solar power.


Scientific Title: Using Energy Transfer in Nanoporous Dye-Sensitized Solar Cells to Improve Light Harvesting

Liquid Dye-sensitized solar cells (DSCs) are an emerging PV technology with the potential for large scale manufacturing and low cost processing. However, the power conversion efficiency of DSCs must increase from 11% to 14% to be commercially competitive with conventional solar cell technologies. DSCs do not completely absorb all of the photons from the visible and near infrared portion of the solar spectrum and consequently have lower short circuit photocurrent densities compared to inorganic photovoltaic devices. A variety of sensitizing dyes have been explored, but it is extremely challenging to develop a single dye that can absorb in the visible and NIR spectrum. I will present a new design where energy relay dyes unattached to the titania absorb high energy photons and transfer their energy to the sensitizing dye via Förster resonant energy transfer. This novel architecture allows for broader spectral absorption and an increase in dye loading. In liquid DSCs, we have demonstrated a 26% increase in the power conversion efficiency when using an energy relay dye with an organic, near-infrared sensitizing dye.

Wednesday, November 10, 2010

Lost Cell Phone Found by the epi2

A concerned lab member found a cell phone by the epi2.  It was sitting there for a couple of days.  If this phone is yours please come to my cubicle (#41) and claim it.

 

Maureen

 

 

 

Maureen Baran

Stanford Nanofabrication Facility

Lab Services Administrator

mbaran@stanford.edu

650-725-3664

 

Reminder : PhD Orals : Aneesh Nainani, tomorrow (11:00am) @ CISX -Auditorium


Development of high performance III-V pMOSFET

Nov. 11, 11am (refreshments at 10:40am)

Aneesh Nainani

Advisor: Prof. Krishna Saraswat

Committee: Prof. Paul McIntyre, Prof. Yoshio Nishi, Prof. James Harris

Location: Paul G. Allen Auditorium (CISX 101)

http://cis.stanford.edu/misc/directions.html

As scaling of Silicon CMOS technology is only yielding marginal returns, III-V materials are being actively explored as (a) channel materials for future technology nodes for providing high performance at low operating voltages and (b) as enabling materials for optical interconnects. This research is primarily being driven by high electron mobility and direct bandgap in III-V semiconductors. Three major challenges facing the III-V CMOS community right now are (1) development of a III-V pMOSFET with high hole mobility to compliment the III-V nMOSFET (2) development of a high-k dielectric with low interface state densities, suitable for use as gate dielectric (3) integration of III-V materials on Silicon.  In this talk our contributions in overcoming first two challenges and development of an III-V pMOSFET with InGaSb channel material and Al2O3 dielectric will be presented.

(1) Firstly, we start with bandstructure calculations and modeling to identify the optimal material, strain configuration and heterostructure design for enhancing hole mobility in III-V channels, which had traditionally lagged in comparison to Silicon.

(2) Compressively strained InGaSb quantum-well channels, identified from modeling results have been investigated for obtaining high hole-mobility. Parameters such as strain, valence band offset etc. have been experimentally measured. Transport and bandstructure have been quantified by studying these 2D hole gases under high magnetic field.

(3) After establishing the feasibility of these materials for hole-transport, we have worked towards development of a pMOSFET with Sb-based channel. Al2O3 dielectric with mid-bandgap density of interface states of 3E11/cm2eV on GaSb substrate was developed. Finally, surface/buried channel III-V pMOSFETs with SS of 120mV/decade, Ion/Ioff > 10E4 and having more than 50/100% mobility gain on Germanium over the entire sheet range have been fabricated using a sub 350°C self-aligned process flow.





Re: Problem p5000etch SNF 2010-11-10 11:30:48: Ch.B is down

Vacuum wafer chips and wiped down chamber with ipa and
water. The quartz clamp is chipped on the finger causing the
wafer to break during clamping, installed new quartz clamp
and verified clamp froce.

Friday, November 5, 2010

Thin Film Transistors

Dear SNF members,
I am interested in fabricating a switch matrix using TFTs on glass substrate.  I was wondering if anybody knows of any foundry that might be able to help me with this.  It would be ideal, if there was something equivalent to a TSMC or MOSIS shuttle run but with TFTs instead.  If anybody has any ideas or tips I'd be very grateful.
thanks,
Mehdi

--
Mehdi Javanmard, PhD
Engineering Research Associate
Stanford Genome Technology Center
mehdij@stanford.edu

Announcement ION BEAM LITHOGRAPHY PRESENTATION by Dr. Lloyd Peto RAITH GmbH Tuesday November 9, 2010 09:30 AM NANOCENTER 143



Greetings:

It is my pleasure to announce a special presentation in Ion Beam Lithography by Dr. Lloyd Peto from Raith GmbH whom will be visiting Stanford this next Tuesday November 9, 2010.

His presentation will be held in the Nanocenter 143 conference room starting at 9:30 AM. The room is
reserved through 11:30 AM to allow for through discussions in Applications of Ion Beam Lithography and the  IonLine system.   All interested parties are welcome to attend and participate in these discussions.  It is hoped that this meeting will create further interest in Ion Beam Lithography here at Stanford.

Thank you for considering attending this meeting,

James Conway
Ebeam Technology Group
Stanford Nanofabrication Facility

 



Ion Beam Lithography with the new Raith ionLiNE Platform

 

 

Abstract:

 

The Raith ionLiNE is new and dedicated ion beam lithography (IBL) system which is the realization of an advanced lithography platform with a highly focused ion beam source.   IBL offers an extension to nanofabrication without many of the limitations of electron beam lithography (EBL), while being fully compatible and complimenting it.  Combining EBL and IBL processes within a single GDSII file is enabling new results and removing the processing limits of conventional tools sets.  Distinct from the established FIB technology, which is based on an analytical SEM platform, IBL opens new frontiers of nanofabrication where resist free, large area, and direct 3-D nanoscale patterning is made possible in an automated and stable platform with nanometer pattern placement accuracy and negating the requirement for direct imaging, simultaneous inspection or user added process variability. 


Neil Lloyd Peto BSc Hons Physics

Lloyd has been working with focused ion beams since being an undergraduate. Initially working at the Rutherford Appleton Research Labs in Oxfordshire but then joining FEI in 1993 as an applications engineer. Lloyd has since worked for FEI company, Micrion corporation and now Raith GmbH in a number of countries. His career progressed through applications development, business development, sales management, marketing, and management of several commercial ion beam lab.



 

Reminder: Arash Hazeghi's PhD Orals

STANFORD UNIVERSITY ORAL DEFENSE – DEPARTMENT OF ELECTRICAL ENGINEERING

 

Speaker: Arash Hazeghi

Advisor:   Prof. H.-S. Philip Wong

Date:   Friday, Nov. 5th

Time:   3:00PM (Refreshments served at 2:45PM)

Location: CIS-X Auditorium

 

Title: CARBON NANOTUBE ELECTRONICS

 

Abstract:

 

For more than four decades, Moore’s law has been the driving force of the semiconductor industry. Thanks to the continuous scaling of Silicon CMOS, rapid development of faster, smaller and cheaper electronics has been realized extending the boundaries of science and technology. However, as scaling continues into the new decade and beyond 20nm, short-channel effects, parasitics, power dissipation, lithography limitations and process variation limit the performance of Silicon CMOS. In order to overcome these challenges new types of semiconductor material and technology are needed.

 

With a diameter of no more than a few nanometers, Carbon Nanotubes (CNT) have unique electronic and structural properties that makes them ideal candidates for high performance digital logic applications. Recent innovations in high-density horizontally-aligned CNT synthesis and transfer process have enabled us to fabricate large-scale logic circuits with robust functionality, solely based on CNT Field Effect Transistors (CNFETs).

 

In this work we first investigate one of the major performance-limiting factors of the aligned CNT-based devices, the electrical contact resistance between CNT and metal contact, and propose a solution to reduce this resistance. We also provide a physics-based model for simulation, analysis and design of CNFET devices operating in ballistic as well as low-field semi-classical transport regimes. Finally, since measurement of carrier density is an integral part of understanding these devices, a new Integrated Capacitance Bridge (ICB) device is also provided for high-resolution wide-temperature range measurements of quantum capacitance in nano-structures.

 

 

 

Thursday, November 4, 2010

PhD Orals : Aneesh Nainani, Nov. 11


Development of high performance III-V pMOSFET

Nov. 11, 11am (refreshments at 10:40am)

Aneesh Nainani

Advisor: Prof. Krishna Saraswat

Committee: Prof. Paul McIntyre, Prof. Yoshio Nishi, Prof. James Harris

Location: Paul G. Allen Auditorium (CISX 101)

http://cis.stanford.edu/misc/directions.html

As scaling of Silicon CMOS technology is only yielding marginal returns, III-V materials are being actively explored as (a) channel materials for future technology nodes for providing high performance at low operating voltages and (b) as enabling materials for optical interconnects. This research is primarily being driven by high electron mobility and direct bandgap in III-V semiconductors. Three major challenges facing the III-V CMOS community right now are (1) development of a III-V pMOSFET with high hole mobility to compliment the III-V nMOSFET (2) development of a high-k dielectric with low interface state densities, suitable for use as gate dielectric (3) integration of III-V materials on Silicon.  In this talk our contributions in overcoming first two challenges and development of an III-V pMOSFET with InGaSb channel material and Al2O3 dielectric will be presented.

(1) Firstly, we start with bandstructure calculations and modeling to identify the optimal material, stain configuration and heterostructure design for enhancing hole mobility in III-V channels, which had traditionally lagged in comparison to Silicon.

(2) Compressively strained InGaSb quantum-well channels, identified from modeling results have been investigated for obtaining high hole-mobility. Parameters such as strain, valence band offset etc. have been experimentally measured. Transport and bandstructure have been quantified by studying these 2D hole gases under high magnetic field.

(3) After establishing the feasibility of these materials for hole-transport, we have worked towards development of a pMOSFET with Sb-based channel. Al2O3 dielectric with mid-bandgap density of interface states of 3E11/cm2eV on GaSb substrate was developed. Finally, surface/buried channel III-V pMOSFETs with SS of 120mV/decade, Ion/Ioff > 10E4 and having more than 50/100% mobility gain on Germanium over the entire sheet range have been fabricated using a sub 350°C self-aligned process flow.




5-inch dummy wafers

Hi,
I was wondering if someone might have 2 or 3 used five-inch Si wafers they could spare. I just need them as mechanical dummies so I don't care what kind of films are on them.

Thanks!

Ben

Sent from my iPhone

On Oct 26, 2010, at 4:03 PM, Mary Tang <mtang@stanford.edu> wrote:

>
> --
> Mary X. Tang, Ph.D.
> Stanford Nanofabrication Facility
> CIS Room 136, Mail Code 4070
> Stanford, CA 94305
> (650)723-9980
> mtang@stanford.edu
> http://snf.stanford.edu
>

Re: Problem p5000etch SNF 2010-11-04 00:49:49: Ch. B turbo pump not at speed

Vacuum leak at the turbo purge connection, Repaired tubing
leak and ramped up turbo to speed.

Problem p5000etch SNF 2010-11-04 00:49:49: Ch. B turbo pump not at speed

Walked by the tool Ch. B turbo pump was alarming because it was not at speed.

Wednesday, November 3, 2010

Reminder: PhD Dissertation Defense of Joseph Sulpizio, 11/3 9AM

On Mon, Nov 1, 2010 at 1:57 PM, Joey Sulpizio <jopizio@stanford.edu> wrote:
> DEPT OF PHYSICS
>
> DISSERTATION DEFENSE
>
> Ph.D. Candidate:  Joseph A. Sulpizio
>
> Research Advisor:  David Goldhaber-Gordon
>
> Date:  Wednesday, November 3, 2010
> Time:  9AM
> Location: McCullough 335
>
> Title:  Ballistic Transport in Quantum Hole Wires
>
> Abstract:  Recent experiments on ballistic electron transport in
> semiconductor nanowires have revealed a rich set of phenomena
> associated with one-dimensional (1D) quantum systems.  In this thesis,
> we present measurements of hole transport in ballistic quantum wires
> fabricated by GaAs/AlGaAs cleaved-edge overgrowth (CEO), as hole
> transport in GaAs is expected to exhibit enhanced effects of
> electron-electron interactions and spin-orbit coupling as compared
> with transport of electrons.  To interpret these results, we have
> developed a new, broadly-applicable approach to analyzing the
> transport measurements of a ballistic 1D quantum system.  We validate
> our analysis approach using nonlinear conductance data of both
> electron and hole CEO quantum wires, where we find evidence for the
> importance of charge interactions.  Applying our analysis to
> measurements of hole transport in magnetic field, we find strong
> g-factor anisotropy, which we associate with spin-orbit coupling.
> Finally, we present the first observation of a predicted "spin-orbit
> gap" in the 1D density of states, where counter-propagating spins are
> accompanied by a clear signal in the conductance.
>

Tuesday, November 2, 2010

Lost TLM Karlssus Mask

Dear Labmembers,

Have anyone seen a TLM-C Karlssus Mask near the SVGDev or in the litho room? I've used it last night and seems to have some trouble finding it.

Thanks,

Wooshik Jung

Annual Lab Shutdown: Dec. 16, 2010-Jan. 4, 2011

Dear Labmembers -


The lab will be shutdown from Thursday, December 16, 2010, at 7 am and
reopen for business on Tuesday, January 4, at 7 am. Please plan your
experiments accordingly.


Please also consider this a warning: lab cleanup will begin 6 weeks
from today (Dec. 14). All personal items NOT stored in lab bins will be
removed from the lab starting that day. This includes wafer boxes,
tweezer boxes, tool boxes, etc. In the CAD room (Allen 151), all
storage bins not labeled or with dates older than one year will be
removed. Storage bins must be transparent plastic (no cardboard boxes
allowed.) All items that are removed from the CAD room will be
disposed of.

For building occupants:
- The University is shutdown campus-wide from Monday, Dec. 20 - Monday,
Jan. 3. There will be no regular staff during this time and some
building utilities may be unavailable.
- There will be live testing of the toxic gas detection system, so
building alarms will go off during testing on Thursday-Friday, December
16-17.
- Toxic gases will be shut off on Dec. 16 and turned back on Monday, Jan. 3.
- The scrubber exhaust system will be cleaned on Saturday, December 18.
Because of the strong odors anticipated, the building will be closed.
- All power will be shutoff to both Allen and Allen X buildings on
Tuesday, December 21, for preventive maintenance of the substation.
Make sure your equipment and electronics are safe against power down and
power up.


For more details or questions about the annual shutdown, please contact
one of us.


Thanks for your attention,

Your SNF staff


--
Mary X. Tang, Ph.D.
Stanford Nanofabrication Facility
CIS Room 136, Mail Code 4070
Stanford, CA 94305
(650)723-9980
mtang@stanford.edu
http://snf.stanford.edu

Monday, November 1, 2010

PhD Dissertation Defense of Joseph Sulpizio

DEPT OF PHYSICS

DISSERTATION DEFENSE

Ph.D. Candidate: Joseph A. Sulpizio

Research Advisor: David Goldhaber-Gordon

Date: Wednesday, November 3, 2010
Time: 9AM
Location: McCullough 335

Title: Ballistic Transport in Quantum Hole Wires

Abstract: Recent experiments on ballistic electron transport in
semiconductor nanowires have revealed a rich set of phenomena
associated with one-dimensional (1D) quantum systems. In this thesis,
we present measurements of hole transport in ballistic quantum wires
fabricated by GaAs/AlGaAs cleaved-edge overgrowth (CEO), as hole
transport in GaAs is expected to exhibit enhanced effects of
electron-electron interactions and spin-orbit coupling as compared
with transport of electrons. To interpret these results, we have
developed a new, broadly-applicable approach to analyzing the
transport measurements of a ballistic 1D quantum system. We validate
our analysis approach using nonlinear conductance data of both
electron and hole CEO quantum wires, where we find evidence for the
importance of charge interactions. Applying our analysis to
measurements of hole transport in magnetic field, we find strong
g-factor anisotropy, which we associate with spin-orbit coupling.
Finally, we present the first observation of a predicted "spin-orbit
gap" in the 1D density of states, where counter-propagating spins are
accompanied by a clear signal in the conductance.

Two postdoc positions in Sweden

-------- Original Message --------
Subject: Two postdoc positions in Sweden
Date: Mon, 1 Nov 2010 14:25:10 +0100 (CET)
From: Giuseppe Angilella <giuseppe.angilella@ct.infn.it>
Reply-To: Giuseppe Angilella <Giuseppe.Angilella@ct.infn.it>


Data: Thu, 28 Oct 2010 08:42:29 +0000
Mittente: Carl-Mikael Zetterling <bellman@kth.se>

Dear colleagues,

Excuse the mass mailing. We are currently trying to find two postdocs and
the amount of response is unfortunately low. If you know of any ready
PhDs who would consider coming to Sweden, please ask them to apply
urgently. The deadline for application is already November 1st, but since
we email so late, a partly incomplete application (without recommendation
letters) will also be considered. The two positions with all information
are here:

Process technology for SiC integrated circuits
http://www.kth.se/om/work-at-kth/vacancies/post-doc-position-in-process-technology-for-sic-integrated-circuits-1.68031?l=en_UK

Atomic Layer Deposition for nanoelectronic applications
http://www.kth.se/om/work-at-kth/vacancies/post-doc-position-in-atomic-layer-deposition-for-nanoelectronic-applications-1.68214?l=en_UK

Many thanks in advance,

Carl-Mikael Zetterling
Mikael Östling
KTH Integrated Devices and Circuits
Kista, SWEDEN
bellman@kth.se

Process Clinic, Today, 2-3 pm

Dear Labmembers,

There will be a Process Clinic today, Monday, November 1, from 2-3 pm in the
cubicle
area outside my cubicle #41. Bring device sketches, process
questions/runsheets, and mask
layouts and questions. Mahnaz and Ed will running the clinic.

Maureen