Dear labmembers,
I had deposited 3um LPCVD LTO on the silicon wafers.
The next several steps for the wafers include ASML lithography and STS DRIE.
In this case, should I etch out the oxide on the backside of Si wafers? Or can I use ASML and STS DRIE without backside etching on sample wafers?
Thanks,
Kyunglok
No comments:
Post a Comment